MCIMX27MOP4A Freescale, MCIMX27MOP4A Datasheet - Page 88

• Manufacturer Part Number: MCIMX27MOP4A
• Manufacturer: Freescale

Specifications of MCIMX27MOP4A

• Lead Free Status / RoHS Status: Compliant

Electrical Characteristics
4.3.11.3
Figure 49
parameters.
88
Note: SRXD Input in Synchronous mode only
and
SSI Transmitter Timing with External Clock
Figure 50
All the timings for the SSI are given for a non-inverted serial clock polarity
(TSCKP/RSCKP = 0) and a non-inverted frame sync (TFSI/RFSI = 0). If the
polarity of the clock and/or the frame sync have been inverted, all the timing
remains valid by inverting the clock signal STCK/SRCK and/or the frame
sync STFS/SRFS shown in the tables and in the figures.
All timings are on AUDMUX pads when SSI is being used for data transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
For internal Frame Sync operation using external clock, the FS timing is the
same as that of Tx Data, for example, during the AC97 mode of operation.
Table 47. SSI Receiver with Internal Clock Timing Parameters (continued)
SS49
SS50
SS51
ID
AD1_TXFS (wl)
AD1_TXFS (bl)
(Input)
AD1_RXD
(Input)
AD1_TXD
AD1_TXC
(Output)
Figure 49. SSI Transmitter with External Clock Timing Diagram
(Input)
(Input)
Oversampling clock rise time
Oversampling clock low period
Oversampling clock fall time
show the SSI transmitter timing with external clock, and
SS23
SS27
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
Parameter
SS22
SS31
NOTE
SS37
SS29
SS44
SS26
SS25
Min
—
—
6
SS38
SS45
Max
—
SS24
3
3
SS46
Table 48
Freescale Semiconductor
SS39
Unit
ns
ns
ns
lists the timing
SS33