MT18HTF25672PY-800E1 Micron Technology Inc, MT18HTF25672PY-800E1 Datasheet - Page 12

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MT18HTF25672PY-800E1

Manufacturer Part Number
MT18HTF25672PY-800E1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT18HTF25672PY-800E1

Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
256Mx72
Total Density
2GByte
Chip Density
1Gb
Access Time (max)
40ps
Maximum Clock Rate
800MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
2.88A
Number Of Elements
18
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Compliant
Register and PLL Specifications
Table 14:
PDF: 09005aef80e5e752/Source: 09005aef80e5e626
HTF18C64_128_256x72.fm - Rev. E 3/07 EN
Parameter
DC high-level
input voltage
DC low-level
input voltage
AC high-level
input voltage
AC low-level
input voltage
Output high voltage
Output low voltage
Input current
Static standby
Static operating
Dynamic operating
(clock tree)
Dynamic operating
(per each input)
Input capacitance
(per device, per pin)
Input capacitance
(per device, per pin)
Register Specifications
SSTU32866 devices or equivalent JESD82-16
Notes: 1. Timing and switching specifications for the register listed above are critical for proper
Symbol
V
V
V
V
I
I
IH
IH
V
IL
IL
V
I
I
DDD
DDD
DD
DD
C
C
OH
(
(
OL
I
(
(
I
DC
AC
DC
AC
I
I
)
)
operation of the DDR2 SDRAM registered DIMMs. These are meant to be a subset of the
parameters for the specific device used on the module. Detailed information for this regis-
ter is available in JEDEC standard JESD82.
)
)
512MB, 1GB, 2GB (x72, ECC, SR) 240-Pin DDR2 SDRAM RDIMM
except RESET#
Parity output
Parity output
command
command
command
command
All inputs
Address,
Address,
Address,
Address,
control,
control,
control,
control,
All pins
All pins
All pins
RESET#
Pins
n/a
n/a
RESET# = V
RESET# = V
One data input switching at
V
V
switching 50% duty cycle;
switching 50% duty cycle
IL
IL
RESET# = V
t
V
(
(
CK/2, 50% duty cycle
AC
AC
V
I
V
V
= V
RESET# = V
I
I
I
), I
), I
= V
= V
= V
12
V
Condition
IH
O
O
DD
LVCMOS
LVCMOS
SSTL_18
SSTL_18
SSTL_18
SSTL_18
DD
DD
DD
REF
DD
(
I
= 0; CK and CK#
= 0; CK and CK#
AC
Q = 1.8V
O
, V
, V
Q or V
Q or V
= 0
) or V
±250mV;
SS
I
I
Q (I
= V
= V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SS
IL
O
Q;
SS
IH
IH
SS
(
Q
(
(
Q
= 0)
DC
AC
AC
)
) or
) or
Register and PLL Specifications
V
V
REF
REF
(
(
Min
DC
DC
1.2
2.5
–5
0
0
) + 250
) +125
©2003 Micron Technology, Inc. All rights reserved.
manufacturer
manufacturer
manufacturer
V
V
V
REF
REF
DD
Varies by
Varies by
Varies by
(
(
Max
Q + 250
V
DC
DC
100
0.5
3.5
40
DD
5
) - 125
) - 250
Units
mA
µA
µA
µA
µA
pF
pF
V
V
V
V
V
V

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