AT88SA102S-TH-T Atmel, AT88SA102S-TH-T Datasheet - Page 8

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AT88SA102S-TH-T

Manufacturer Part Number
AT88SA102S-TH-T
Description
Manufacturer
Atmel
Datasheet

Specifications of AT88SA102S-TH-T

Lead Free Status / RoHS Status
Supplier Unconfirmed
8
Table 3.
AT88SA102S
Wake Low
Duration
Wake Delay to
Data Comm.
Start pulse
duration
Zero
transmission
high pulse
Zero
transmission
low pulse
Bit time
Turn around
delay
High side
glitch filter @
active
Low side glitch
filter @ active
High side
glitch filter @
sleep
Low side glitch
filter @ sleep
IO Timeout
Watchdog
reset
Parameter
AC Parameters
t
t
t
t
t
t
t
t
t
t
t
t
t
WLO
WHI
START
ZHI
ZLO
BIT
TURNAROUND
HIGNORE_A
LIGNORE_A
HIGNORE_S
LIGNORE_S
TIMEOUT
WATCHDOG
Symbol
To
CryptoAuthentication
To
CryptoAuthentication
To
CryptoAuthentication
From
CryptoAuthentication
To
CryptoAuthentication
From
CryptoAuthentication
To
CryptoAuthentication
From
CryptoAuthentication
To
CryptoAuthentication
From
CryptoAuthentication
From
CryptoAuthentication
To
CryptoAuthentication
To
CryptoAuthentication
To
CryptoAuthentication
To
CryptoAuthentication
To
CryptoAuthentication
To
CryptoAuthentication
To
CryptoAuthentication
Direction
4.62 6.0
4.62 6.0
4.62 6.0
37.1
46.2
46.2
46.2
Min Typ Max Unit
2.5
4.1 4.34 4.56
4.1 4.34 4.56
4.1 4.34 4.56
60
45
45
45
2
2
3
39
60
60
60
4
8.6
8.6
8.6
5.2
86
86
86
85
-
-
-
ms Signal should be stable high for this
ms Starting as soon as 7ms up to 13ms
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
s
Signal can be stable in either high or low
levels during extended sleep intervals.
entire duration.
If the bit time exceeds t
CryptoAuthentication will enter sleep
mode and the Wake token must be
resent.
CryptoAuthentication will initiate the first
low going transition after this time interval
following the end of the Transmit flag
After CryptoAuthentication transmits the
last bit of a block, system must wait this
interval before sending the first bit of a
flag
Pulses shorter than this in width will be
ignored by the chip, regardless of its
state when active
Pulses shorter than this in width will be
ignored by the chip, regardless of its
state when active
Pulses shorter than this in width will be
ignored by the chip when in sleep mode
Pulses shorter than this in width will be
ignored by the chip when in sleep mode
after the initial signal transition of a token
the chip will enter sleep if no complete &
valid token is received.
Max. time from Wake until chip is forced
into sleep mode. Refer to Watchdog
Failsafe Section 4.5
Notes
TIMEOUT
8584D–SMEM–5/10
then

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