AT88SA102S-TH-T Atmel, AT88SA102S-TH-T Datasheet
AT88SA102S-TH-T
Specifications of AT88SA102S-TH-T
Related parts for AT88SA102S-TH-T
AT88SA102S-TH-T Summary of contents
Page 1
... Anti-clone authentication for daughter cards • Physical access control (electronic lock & key) 1. Introduction The AT88SA102S is a member of the CryptoAuthentication family of cost-effective authentication chips designed to securely authenticate an item to which it is attached. It can also be used to exchange session keys with some remote entity so that the system ...
Page 2
... ROM that specifies part of the manufacturing ID code. This value is assigned by Atmel and is always the same for all chips of a particular model number. For the AT88SA102S, this value is 0x23 01. (Appears on the bus: 0x01 23) ROM MfrID can be read by accessing ROM bytes 0 & Address 0 ...
Page 3
... Fuse Map The AT88SA102S incorporates 128 one-time fuses within the chip. Once burned, there is no way to reset the value of a fuse. Fuses, with the exception of the manufacturer ID and serial number bits initialized by Atmel, have a value of 1 when shipped from the Atmel factory and transition when they are burned. Bits 0-63 can never be read, while bits 64-128 can always be read ...
Page 4
... Key Values The values stored in the AT88SA102S internal key array are hardwired into the masking layers of the chip during wafer manufacture. All chips have the same keys stored internally, though the value of a particular key cannot be determined externally from the chip. For this reason, customers should ensure that they program a unique (and secret) number into the 64 secret fuses and they should store the Atmel provided key values securely ...
Page 5
... These include an active shield over the entire surface of the part, internal memory encryption, internal clock generation, glitch protection, voltage tamper detection and other physical design features. Pre-programmed keys stored on the AT88SA102S are encrypted in such a way as to make retrieval of their values via outside analysis very difficult. ...
Page 6
... IO Protocol Communications to and from the AT88SA102S take place over a single asynchronously timed wire using a pulse count scheme. The overall communications structure is a hierarchy: Table 2. IO Hierarchy Tokens Implement a single data bit transmitted on the bus, or the wake-up event. Comprised of eight tokens (bits) which convey the direction and meaning of the next group of bits (if any) Flags which may be transmitted ...
Page 7
... LIGNORE HIGNORE * NOTICE: Stresses beyond those listed under “Absolute +0.5V CC AT88SA102S Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of this specification is not implied ...
Page 8
... LIGNORE_A filter @ active High side t HIGNORE_S glitch filter @ sleep Low side glitch t LIGNORE_S filter @ sleep IO Timeout t TIMEOUT Watchdog t WATCHDOG reset AT88SA102S 8 Direction Min Typ Max Unit To 60 CryptoAuthentication To 2.5 CryptoAuthentication To 4.1 4.34 4.56 CryptoAuthentication From 4.62 6.0 CryptoAuthentication To 4.1 4.34 4.56 ...
Page 9
... V 1.0 3 -0.5 0 1 5.25 MAX 4 V ESD AT88SA102S Unit Notes °C V Voltage applied to V pin during BurnSecure cc V and/or BurnFuse mA When chip is in sleep mode Vsig = 0.0 to 0.5V or Vsig = V -0. When chip is in sleep mode, V µA Vsig = 0.0 to 0.5V or Vsig = V -0 ...
Page 10
... Sleep All other values are reserved and will be ignored. As the single signal wire may be shared with a CryptoAuthentication host chip, the AT88SA102S chip includes a PauseLong command which causes it to ignore all activity on the signal pin until the expiration of the watchdog timer. 4.1.1. Command Timing After a command flag is transmitted, a command block should be sent to the chip ...
Page 11
... Transmit Flag The Transmit flag is used to turn around the signal so that the AT88SA102S can send data back to the system, depending on its current state. The bytes that the AT88SA102S returns to the system depend on its current state as follows: Table 6. Return Codes State Description ...
Page 12
... When in the pause state, the chip ignores all transitions on the signal pin but does not enter a low power consumption mode. The pause state provides a mechanism for multiple AT88SA102S chips on the same wire to be selected and to exchange data with the host microprocessor. The PauseLong command includes an optional address field which is compared to the values in Fuses 84-87. If the two match, then the chip enters the pause state, otherwise it continues to monitor the bus for subsequent commands. The host would selectively put all but one AT88SA102S’ ...
Page 13
... If the leading edge of the next token is not received within this period of time, during which time CryptoAuthentication should go to sleep automatically. At this point Transmit token. The 0x11 status indicates that the WLO WHI delay with the IO signal idle in which case CryptoAuthentication may have TIMEOUT AT88SA102S + there is an error PARSE EXEC . PARSE interval, then ...
Page 14
... The total size of the block for each of the commands is fixed, though that value is different for each command. If the block size for a particular command is incorrect, the chip will not attempt the command execution and return an error. AT88SA102S 14 Meaning The Command code The first parameter – ...
Page 15
... Size 1 0x08 Controls which fields within the chip are used in the 1 message. 2 Which internal key used in the message. 32 Input portion of message to be digested. Size 32 SHA-256 digest. AT88SA102S Notes Notes 15 ...
Page 16
... If set and Fuse[87] is burned, include the 64 secret fuses and 24 status fuses (Fuse[0] through Fuse[87]) in the message. Otherwise, the corresponding message bits are set to 0. 3-0 Should Fuse[87] is unburned, then the secret and status fuses are NOT included in the message and they are replaced with 0’s. AT88SA102S 16 Meaning 8584D–SMEM–5/10 ...
Page 17
... Reads four bytes from the ROM. Bit 1 of the address parameter must be 0. Reads the value of 32 fuses. Bit 1 of the address parameter must be 1. The input address parameter << 5 provides the fuse number corresponding to the LSB of the first returned byte. AT88SA102S Notes Notes Notes ...
Page 18
... Which bit within fuse array, minimum value is 64, and maximum value is 86. 2 Must be 0x00 00 if Vcc > 4.5V, must be 0x80 00 otherwise. 0 Upon successful execution, a value of 0 will be returned by the AT88SA102S. then the BurnTime parameter should be set to 0x8000 Notes Notes 8584D–SMEM–5/10 ...
Page 19
... Size 1 0x20 1 Must be 0x00 2 Identification number of the personalization key to be loaded. Seed for digest generation. The least significant bit of the last byte is 16 ignored by the AT88SA102S. Upon successful execution of HOST0, a value of 0 will be returned by the AT88SA102S. AT88SA102S Notes Notes 19 ...
Page 20
... If a bit in the map parameter is 0, then the corresponding fuse is left in its current state. The first bit sent to the AT88SA102S corresponds to Fuse[0] and Fuse[87]. Note that since a ‘1’ bit in the Map parameter results in a ‘0’ data value in the actual fuse array, the value in the Map parameter should generally be the inverse of the desired secret or status value ...
Page 21
... During execution of this command and while in the pause state the chip will ignore all activity on the IO signal. This command is used to prevent bus conflicts in a system that also includes other AT88SA102S chips or a CryptoAuthentication host chip sharing the same signal wire. ...
Page 22
... V in use this pin can be pulled to either V 8 Power supply, 2.7 – 5.25V. This pin should be bypassed with a high quality 0.1µF capacitor V CC close to this pin with a short trace to V www.atmel.com. AT88SA102S 22 Description for proper communications. When the chip is not ...
Page 23
... TO-236, Variation AB for additional information. Package Drawing Contact: packagedrawings@atmel.com R 8584D–SMEM–5/ Top View b A2 PLANE Side View TITLE 3TS1, 3-lead, 1. dy, PlasticThin Shrink Small OutlinePackage (Sh rink SOT) AT88SA102S C L End View A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM 2.80 2. ...
Page 24
... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. Package Drawing Contact: packagedrawings@atmel.com AT88SA102S End View SYMBOL ...
Page 25
... These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 8584D–SMEM–5/ TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT88SA102S End View COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 1.35 – 1. ...
Page 26
... Ordering Codes Table 23. Ordering Codes Ordering Code AT88SA102S-TSU-T AT88SA102S-TH-T AT88SA102S-SH-T 9. Revision History Table 24. Revision History Doc. Rev. Date 8584D 05/2010 8584C 04/2010 8584B 02/2010 8584A 03/2009 AT88SA102S 26 Package Type Voltage Range SOT, Tape & Reel 2.7V–5.25V TSSOP, Tape & Reel 2.7V– ...
Page 27
... OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’ ...