S71NS128NB0BJWRN0 Spansion Inc., S71NS128NB0BJWRN0 Datasheet
S71NS128NB0BJWRN0
Specifications of S71NS128NB0BJWRN0
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S71NS128NB0BJWRN0 Summary of contents
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S71NS-N MCP Products ® MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory 256 Mb ( 16-bit), 128 16-bit) and 16-bit) with Multiplexed pSRAM ...
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... Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.” ...
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... Publication Number S71NS-N_00 This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice. ...
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Ordering Information The order number is formed by a valid combinations of the following: S71NS 128 ...
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1.1 Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check ...
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Input/Output Descriptions Table 2.1 identifies the input and output package connections provided on the device. Symbol AMAX – A16 Address inputs ADQ15 – ADQ0 Multiplexed Address/Data OE# Output Enable input. Asynchronous relative to CLK for the Burst mode. WE# ...
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MCP Block Diagram F-RST# F-ACC F-WP# F-CE # OE# WE# AVD # CLK Amax-A16 R-CE# R-CRE R-UB # R-LB # Note The CLK and WAIT signals on the pSRAM are ...
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Connection Diagrams 4.2.1 pSRAM Based Pinout, 56-Ball, VFBGA Notes 1. Addresses are shared between Flash and RAM depending on the density of the pSRAM. 2. CLK and WAIT signals are Flash only for the S71NS064NA0-RT, ...
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4.2.2 pSRAM Based Pinout, 60-Ball, VFBGA Note Addresses are shared between Flash and RAM depending on the density of the pSRAM. MCP S71NS256NC0 ...
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Look Ahead Connection Diagram Figure 4.3 112-ball x16 MUX NOR Flash + x16 MUX pSRAM on Shared Bus and x16 NAND Interface DNU E DNU ...
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4.3 Physical Dimensions 4.3.1 NLB056—9.2 x 8.0 mm, 56-ball VFBGA 0.10 C (2X) INDEX MARK PIN A1 CORNER 56X 0. PACKAGE NLB ...
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NLA060—11.0 x 10.0 mm, 60-ball VFBGA 0.15 C (2X) INDEX MARK PIN A1 CORNER 60X 0.15 0.08 PACKAGE NLA 060 JEDEC N 10. 9.95 mm PACKAGE SYMBOL MIN NOM A --- ...
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Revision History Section Revision A (January 3, 2006) Initial Release under Publication Identification Number S71NS128NC0_01 Revision A1 (March 1, 2006) Changed the Publication Identification Number from S71NS128NC0_01 to S71NS-N_00 Global ...
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... Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2007-2009 Spansion Inc. All rights reserved. Spansion ™ ™ ...