MC33910BACR2 Freescale, MC33910BACR2 Datasheet - Page 30

• Manufacturer Part Number: MC33910BACR2
• Manufacturer: Freescale

Specifications of MC33910BACR2

• Lead Free Status / RoHS Status: Compliant

RESET
time the reset condition lasts.
drive the RST output low for at least 1.0 ms (typical value)
before driving it high.
5.0 V Regulator Low-voltage-Reset (V
against brown outs. If the supply monitor detects that the
voltage at the VDD pin has dropped below the reset threshold
V
temperature, the voltage regulator will be disabled and the
voltage monitoring will issue a VDDOT Flag independently of
the V
Window Watchdog Overflow
window is open, the 33910 will detect an MCU software run-
away and will reset the microcontroller.
Wake-up From Sleep Mode
hence all wake-up requests from Sleep mode require a
power-up/reset sequence.
External Reset
device to a safe state (same as Reset mode) for as long as
this pin is held low. The RST pin must be held low long
enough to pass the internal glitch filter and get recognized by
the internal reset circuit. This functionality is also active in
Stop mode.
considered.
WAKE-UP CAPABILITIES
Stop) only wake-up sources can bring the device into Normal
mode operation.
interrupt, while in Sleep mode the wake-up is performed by
activating the 5.0 V regulator and resetting the MCU. In both
cases the MCU can detect the wake-up source by accessing
the SPI registers and reading the Interrupt Source Register.
There is no specific SPI register bit to signal a CS wake-up or
external reset. If necessary this condition is detected by
excluding all other possible wake-up sources.
Wake-up from Wake-up input (L1) with cyclic sense
disabled
external switch and wake-up the MCU (in Sleep or Stop
mode).
30
33910
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
RSTTH
To reset a MCU the 33910 drives the RST pin low for the
After the reset source is removed, the state machine will
In the 33910, four main reset sources exist:
The 5.0 V regulator output V
If the watchdog counter is not properly serviced while its
During Sleep mode, the 5.0 V regulator is not active,
The 33910 has a bidirectional reset pin which drives the
After the RST pin is released, there is no extra
Once entered into one of the low-power modes (Sleep or
In Stop mode, a wake-up is signaled to the MCU as an
The wake-up line is dedicated to sense state changes of
DD
the 33910 will issue a reset. In case of over-
voltage.
DD
is continuously monitored
RSTTH
)
t
RST
to be
input, the Wake-up Control Register (WUCR) must be
configured with appropriate L1WE input enabled or disabled.
The wake-up input’s state is read through the Wake-up
Status Register (WUSR).
before entering low power mode will disable the wake-up
capability of the L1 input
Wake-up from Wake-up input (L1) with cyclic sense timer
enabled
period if on the wake-up input line (L1) a state change occurs.
One or both HSx switch can be activated in Sleep or Stop
modes from an internal timer. Cyclic sense and force wake-
up are exclusive. If cyclic sense is enabled, the force wake-
up can not be enabled.
from the L1 input, before entering in low power modes (Stop
or Sleep modes), the following SPI set-up has to be
performed:
Forced Wake-up
predetermined time spent in Sleep or Stop mode. Cyclic
sense and Forced wake-up are exclusive. If Forced wake-up
is enabled, the Cyclic Sense can not be enabled.
has to be sent before entering in low power modes:
CS Wake-up
wake-up. The CS wake-up does not generate an interrupt,
and is not reported on SPI.
LIN Wake-up
activity on the LIN bus. A dominant pulse larger than t
followed by a dominant to recessive transition will cause a
LIN wake-up. This behavior protects the system from a short
to ground bus condition. The bit RXONLY = 1 from LINCR
Register disables the LIN wake-up from Stop mode.
In order to select and activate direct wake-up from L1
L1 input is also used to perform cyclic-sense wake-up.
Note: Selecting an L1 input in the analog multiplexer
The SBCLIN can wake-up at the end of a cyclic sense
In order to select and activate the cyclic sense wake-up
In WUCR: select the L1 input to WU-enable.
In HSCR: enable the desired HSx.
• In TIMCR: select the CS/WD bit and determine the
• Perform Goto Sleep/Stop command.
The 33910 can wake-up automatically after a
To determine the wake-up period, the following SPI set-up
• In TIMCR: select the CS/WD bit and determine the low
• In HSCR: all HSx bits must be disabled.
While in Stop mode, a rising edge on the CS will cause a
While in the low-power mode, the 33910 monitors the
cyclic sense period with CYSTx bits.
power mode period with CYSTx bits.
Analog Integrated Circuit Device Data
Freescale Semiconductor
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