SGTL5000XNLA3R2 Freescale, SGTL5000XNLA3R2 Datasheet - Page 47

• Manufacturer Part Number: SGTL5000XNLA3R2
• Manufacturer: Freescale

Specifications of SGTL5000XNLA3R2

• Single Supply Voltage (typ): 1.8/2.5/3.3V
• Lead Free Status / RoHS Status: Compliant

Table 36. CHIP_ANA_TEST2 0x003A
Analog Integrated Circuit Device Data
Freescale Semiconductor
8
7
6
5
4
3
2
1
0
BITS
BITS
15
15
14
13
12
11
10
9
8
7
INVERT_DAC_SAMPL
INVERT_DAC_DATA_
LO_PASS_MASTERV
HP_CLASSAB
HP_HOLD_GND_CE
NTER
HP_HOLD_GND
VAG_DOUB_CURRE
NT
VAG_CLASSA
TM_ADCIN_TOHP
TM_HPCOMMON
TM_SELECT_MIC
TESTMODE
LINEOUT_TO_VDDA
DAC_EXTEND_RTZ
14
VCO_TUNE_AGAIN
MONOMODE_DAC
E_CLOCK
TIMING
SPARE
FIELD
FIELD
RSVD
AG
13
12
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
11
0x1
0x1
0x1
0x0
0x0
0x0
0x0
0x0
0x0
RESET
RESET
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
10
Reserved
Changes the lineout amplifier power supply from VDDIO to VDDA. Typically lineout
should be on the higher power supply. This bit is useful when VDDA is ~3.3 V and
VDDIO is ~1.8 V.
Spare registers to analog.
Copy the left channel DAC data to the right channel. This allows both left and right to
play from MONO dac data.
When toggled high then low forces the PLL VCO to retune the number of inverters in
the ring oscillator loop.
Tie the main analog VAG to the lineout VAG. This can improve SNR for the lineout
when both are the same voltage.
Change the clock edge used for the DAC output sampling.
Change the clock edge used for the digital to analog DAC data crossing.
Extend the return-to-zero time for the DAC.
This defaults high. When this bit is high the headphone is in classAB mode. ClassA
mode would normally not be used.
This defaults high. When this bit is high and the capless headphone center channel is
powered off the output will be tied to ground. This is the preferred mode of operation
for best antipop performance.
This defaults high. When this bit is high and the headphone is powered off the output
will be tied to ground. This is the preferred mode of operation for best antipop
performance.
Double the VAG output current when in classA mode.
Turn off the classAB output current for the VAG buffer. The classA current is limited so
this may cause clipping in some modes.
Put ADCmux output onto the headphone output pin. Must remove headphone load and
any external headphone compensation for this mode.
Enable headphone common to be used in ADCmux for testing
Enable the mic-adc-dac-HP path
Enable the analog test mode paths
9
8
7
6
DEFINITION
DEFINITION
5
4
FUNCTIONAL DEVICE OPERATION
3
PROGRAMMING EXAMPLES
2
1
SGTL5000
0
47