AD73422BB-80 Analog Devices Inc, AD73422BB-80 Datasheet - Page 35

• Manufacturer Part Number: AD73422BB-80
• Manufacturer: Analog Devices Inc

Specifications of AD73422BB-80

• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 3.6V
• Package Type: BGA
• Lead Free Status / RoHS Status: Not Compliant

input channel is being used in single-ended mode where the
internal inverting amplifier provides suitable gain to scale the
input signal relative to the ADC’s full-scale input range. The
buffered internal reference level at REFOUT is used via an
external buffer to provide power to the electret microphone.
This provides a quiet, stable supply for the microphone. If this
is not a concern, then the microphone can be powered from the
system power supply.
Analog Output
The AD73422’s differential analog output (VOUT) is produced
by an on-chip differential amplifier. The differential output can
be ac-coupled or dc-coupled directly to a load that can be a
headset or the input of an external amplifier (the specified
minimum resistive load on the output section is 150 Ω.) It is
possible to connect the outputs in either a differential or a
single-ended configuration, but please note that the effective
maximum output voltage swing (peak-to-peak) is halved in the
case of single-ended connection. Figure 32 shows a simple cir-
cuit providing a differential output with ac coupling. The ca-
pacitors in this circuit (C
can be chosen as follows:
where f
REV. 0
R
LOAD
Figure 32. Example Circuit for Differential Output
C
C
REFCAP
C
C
= desired cutoff frequency.
OUT
OUT
REFOUT
VOUTN1
REFCAP
VOUTP1
VFBN1
VFBP1
VINN1
VINP1
C
V
OUT
REF
OUT
=
) are optional; if used, their value
2π
+6/–15dB
GAIN
PGA
f R
1
C
1
LOAD
REFERENCE
CONTINUOUS
LOW-PASS
FILTER
TIME
AD73422
V
REF
0/38dB
PGA
–35–
Figure 33 shows an example circuit for providing a single-ended
output with ac coupling. The capacitor of this circuit (C
not optional if dc current drain is to be avoided.
Differential-to-Single-Ended Output
In some applications it may be desirable to convert the full
differential output of the decoder channel to a single-ended
signal. The circuit of Figure 34 shows a scheme for doing this.
R
R
LOAD
Figure 34. Example Circuit for Differential-to-Single-
Ended Output Conversion
LOAD
Figure 33. Example Circuit for Single-Ended Output
R
F
C
R
OUT
F
REFOUT
VOUTN1
REFCAP
VOUTP1
REFCAP
VFBN1
VFBP1
REFOUT
VINN1
VINP1
VOUTN1
VOUTP1
0.1 F
0.1 F
VFBN1
VFBP1
VINN1
VINP1
R
R
I
I
V
REF
V
REF
+6/–15dB
+6/–15dB
GAIN
PGA
GAIN
PGA
1
1
REFERENCE
REFERENCE
CONTINUOUS
LOW-PASS
CONTINUOUS
LOW-PASS
FILTER
TIME
FILTER
TIME
AD73422
AD73422
AD73422
V
REF
0/38dB
PGA
OUT
) is