AD9842AJSTZRL Analog Devices Inc, AD9842AJSTZRL Datasheet - Page 17

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AD9842AJSTZRL

Manufacturer Part Number
AD9842AJSTZRL
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9842AJSTZRL

Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Resolution
10b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Number Of Channels
1
Lead Free Status / RoHS Status
Compliant
D10
X
D10
X
D10
X
X
D10
Control Register Bit D3 must be set High (PxGA Enable) to use the PxGA Gain Registers.
When D3 = 0 (PxGA disabled) the PxGA gain is fixed to 4 dB.
Must be set to zero.
Data Out
D9
0 Enable
1 Three-State
D9
X
D9
X
D9
X
D8
X
D8
X
D8
X
Table VII. PxGA Gain Registers for Gain0, Gain1, Gain2, Gain3 (Default Value x000)
D8 D7 D6
0
D7
D7
MSB
0
0
0
1
1
MSB
0
0
0
1
1
Table IV. AD9841A Clamp Level Register Contents (Default Value x080)
0
Table V. AD9842A Clamp Level Register Contents (Default Value x080)
D7
X
1 Falling Edge Trigger 1 Active High 1 Active High
DATACLK
0 Rising Edge Trigger 0 Active Low 0 Active Low
Table VI. Control Register Contents (Default Value x000)
D6
0
0
0
1
1
D6
0
0
0
1
1
D6
X
D5
0
0
0
1
1
D5
0
0
0
1
1
MSB
D5
0
0
1
1
D4
0
0
0
1
1
D4
0
0
0
1
1
CLP/PBLK
D5
D4
1
0
1
0
D3
1
1
D3
1
1
0
0
0
0
0
0
SHP/SHD
D4
D3
1
0
1
0
D2
0
0
0
1
1
D2
0
0
0
1
1
D2
1
0
1
0
D1
0
0
1
1
1
D1
0
0
1
1
1
PxGA
D3
0 Disable 0
1 Enable 0
D1
1
0
1
0
AD9841A/AD9842A
LSB
D0
0
1
0
0
1
LSB
D0
0
1
0
0
1
Color Steering Modes
D2 D1 D0
0
0
1
1
1
1
LSB
D0
1
0
1
0
0
0
1
1
0
0
1
1
Clamp Level (LSB)
0
0.25
0.5
63.5
63.75
Clamp Level (LSB)
0
1
2
254
255
0 Steering Disabled
1 Mosaic Separate
0 Interlace
1 3-Color
0 4-Color
1 VD Selected
0 Mosaic Repeat
1 User Specified
Gain (dB)
+10.0
+4.3
+4.0
–2.0

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