WBLXT9785HC.D0-865113 Cortina Systems Inc, WBLXT9785HC.D0-865113 Datasheet - Page 150

• Manufacturer Part Number: WBLXT9785HC.D0-865113
• Manufacturer: Cortina Systems Inc

Specifications of WBLXT9785HC.D0-865113

• Lead Free Status / RoHS Status: Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
4.11.4
Cortina Systems
Register bit 27.2 is set if link is not established prior to the Link Fail Inhibit Timer expiring.
This indicates that the Discovery process has restarted and the Standard Link Partner
Detected Register bit may no longer be valid. Register bit 27.2 is cleared on read, or DTE
discovery is disabled, link is established, or auto-negotiation is either restarted or
disabled.
DTE Discovery Process Flow
The following section describes the DTE Discovery process.See
Cortina Systems
discovery process.When DTE Discovery (27.6) and auto-negotiation (0.12) are enabled
(auto-negotiation mode is required), the LXT9785E transmits the auto-negotiation base
page with the next page ability bit set
(Section Table 88, Auto-Negotiation Advertisement Register (Address 4), on page
System software polls Register 27 to determine if or when a Remote-Power DTE is
detected. The receiver monitors the line to determine if NLPs, MLT3 data, or FLP bursts
are being received. If the receive activity is FLP bursts, the status of the next page ability
bit is checked. If the detected “link partner” also supports next page, then the LXT9785E
transmits out the next page sequence associated with message code #5 (Organizationally
Unique Identifier (OUI) Tag Code). The definition for the next pages to be sent out for this
message code include some user-defined code values. These values are loaded with
randomly created data from an internal LSFR that is free running and seeded with the
PHY address of the LXT9785E port. The Next Pages are hard coded in the logic (the
LXT9785E ignores any data written into Register 7) and are outlined in
receiver monitors the next pages to determine that the exact next page data (especially
the random data) transmitted is received. As soon as the first non-matching next page is
detected, the DTE Discovery process is stopped and the base page is used to determine
the capability options. The Power-Enable Register bit 27.4 is set when a Remote-Power
DTE is detected as the link partner, and the last next page is repeatedly transmitted until
software restarts the required negotiation process (auto-negotiation or forced-speed
mode).
The software should be written so that the negotiation is not restarted until the DTE has
been powered up over the Category 5 cable. The Power-Enable Register bit 27.4 is
cleared upon restarting or disabling auto-negotiation (selecting forced mode). The system
must be able to detect over-current conditions and be capable of disabling power in case
the link partner is not a Remote-Power DTE. Some examples of devices that would
mistakenly set Power-Enable Register bit 27.4 are a token-ring balun and a loopback
cable. Once link partner power has been stabilized and sufficient time has passed for the
link partner to initialize, the auto-negotiation process may be restarted.
The negotiation process establishes link if a compatible mode exists between the
LXT9785E and the link partner. If a compatible mode does not exist (not compatible or not
established within the Link Fail Inhibit Timer period), the LXT9785E either restarts auto-
negotiation/DTE discovery (discovery is enabled (27.6=1) and auto-negotiation is enabled
(0.12 = 1)), or normal negotiation (discovery is disabled (27.6=0) and auto-negotiation is
enabled (0.12 = 1)), or either 10 Mbps or 100 Mbps forced-mode operation (auto-
negotiation is disabled (0.12 = 0)). The software must detect this non-link state and
disable power.
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
®
LXT9785E Negotiation Flow Chart, on page 152
4.11 DTE Discovery Process
Figure 30,
for a flow chart of the
Table
48. The
Page 150
195).