LAN9215-MT Standard Microsystems (SMSC), LAN9215-MT Datasheet - Page 61

• Manufacturer Part Number: LAN9215-MT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9215-MT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9215
3.13.2
3.13.3
29:16
BITS
31
30
15
14
13
Reserved. This bit is reserved. Reads 0.
Filtering Fail. When set, this bit indicates that the associated frame failed the address recognizing
filtering.
Packet Length. The size, in bytes, of the corresponding received frame.
Error Status (ES). When set this bit indicates that the MIL has reported an error. This bit is the
Internal logical “or” of bits 11,7,6 and 1.
Reserved. These bits are reserved. Reads 0.
Broadcast Frame. When set, this bit indicates that the received frame has a Broadcast address.
RX Packet Format
The RX status words can be read from the RX status FIFO port, while the RX data packets can be
read from the RX data FIFO. RX data packets are formatted in a specific manner before the host can
read them as shown in
status word from the RX status FIFO, to ascertain the data size and any error conditions.
Note 3.17 The LAN9215 host bus interface supports 16-bit bus transfers; internally, all data paths are
RX Status Format
32-bits wide.
transactions.
Host Read
Order
Last
2nd
1st
Figure
Figure 3.18
Figure 3.18 RX Packet Format
3.18. It is assumed that the host has previously read the associated
31
ofs + First Data DWORD
Optional offset DWORDn
Optional offset DWORD0
DATASHEET
Optional Pad DWORD0
Optional Pad DWORDn
Last Data DWORD
describes the host read ordering for pairs of atomic 16-bit
DESCRIPTION
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Revision 2.7 (03-15-10)