IDT77V1254L25PG IDT, Integrated Device Technology Inc, IDT77V1254L25PG Datasheet - Page 38

• Manufacturer Part Number: IDT77V1254L25PG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT77V1254L25PG

• Data Rate: 25.6/51.2Mbps
• Number Of Channels: 4
• Type Of Atm Phy Interface: DPI/UTOPIA
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 144
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Enhanced Control 1 Registers
RXREF and TXREF Control Register
Absolute Maximum Ratings
Addresses: 0x40
7-6
5
4
3-0
Addresses: 0x08, 0x18, 0x28, 0x38
7
6
5
4-0
IDT77V1254L25
Bit
Bit
W
R/W
R/W
R/W
Note: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Type
Type
R/W
R/W
W
0 = not reset
0 = OSC
0
Port 0 (Reg 0x08) 00000
Port 1 (Reg 0x18) 00001
Port 2 (Reg 0x28) 00010
Port 3 (Reg 0x38) 00011
0 = RXREF0 (Port 0) RXREF Source Select Selects which of the four ports (0-3) is the source of RXREF.
0000 = not looped
Initial State
Initial State
0 = not reset
0
VTERM
TBIAS
TSTG
IOUT
Symbol
Master Software Reset 1 = Reset. This bit is self-cleaning; it isn’t necessary to write “0” to exit reset.
Reserved
RXREF to TXREF Loop Select When set to 0, TXREF is used to generate X_8 timing marker commands.
When set to 1, TXREF input is ignored, and received X_8 timing commands.
are looped back and added to the transmit stream of that same port. See Figure 7.
Individual Port Software Reset 1= Reset. This bit is self-cleaning; It isn’t necessary to write “0” to exit reset.
Transmit Line Clock (or Loop Timing Mode). When set to 0, the OSC input is used as the transmit line clock.
When set to 1, the recovered receive clock is used as the transmit line clock.
Reserved
Utopia 2 Port Address When operating in Utopia 2 Mode, these register bits determine the Utopia 2 port address
bit 3: port 3
bit 2: port 2
bit 1: port 1
bit 0: port 0
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
DC Output Current
Rating
38 of 48
Function
-0.5 to +5.5
-55 to +125
-55 to +120
50
Function
Value
V
mA
C
C
Unit
December 2004