LAN9313-NZW SMSC, LAN9313-NZW Datasheet - Page 250

• Manufacturer Part Number: LAN9313-NZW
• Description: Ethernet ICs Three Port 10/100 Ethernet Switch
• Manufacturer: SMSC
• Type: Three Port Managed Ethernet Switchr

Specifications of LAN9313-NZW

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 0 V
• Supply Current (max): 155 mA, 270 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.7 (06-29-10)
13.2.2.11
BITS
15:8
7
6
5
4
3
2
1
0
RESERVED
INT7
This interrupt source bit indicates when the ENERGYON bit of the
PHY Mode Control/Status Register (PHY_MODE_CONTROL_STATUS_x)
has been set.
0: Not source of interrupt
1: ENERGYON generated
INT6
This interrupt source bit indicates Auto-Negotiation is complete.
0: Not source of interrupt
1: Auto-Negotiation complete
INT5
This interrupt source bit indicates a remote fault has been detected.
0: Not source of interrupt
1: Remote fault detected
INT4
This interrupt source bit indicates a Link Down (link status negated).
0: Not source of interrupt
1: Link Down (link status negated)
INT3
This interrupt source bit indicates an Auto-Negotiation LP acknowledge.
0: Not source of interrupt
1: Auto-Negotiation LP acknowledge
INT2
This interrupt source bit indicates a Parallel Detection fault.
0: Not source of interrupt
1: Parallel Detection fault
INT1
This interrupt source bit indicates an Auto-Negotiation page received.
0: Not source of interrupt
1: Auto-Negotiation page received
RESERVED
Port x PHY Interrupt Source Flags Register (PHY_INTERRUPT_SOURCE_x)
This read-only register is used to determine to source of various Port x PHY interrupts. All interrupt
source bits in this register are read-only and latch high upon detection of the corresponding interrupt
(if enabled). A read of this register clears the interrupts. These interrupts are enabled or masked via
the
Port x PHY Interrupt Mask Register
Index (decimal): 29
DESCRIPTION
DATASHEET
(PHY_INTERRUPT_MASK_x).
250
Size:
Three Port 10/100 Managed Ethernet Switch with MII
16 bits
Port x
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
TYPE
SMSC LAN9313/LAN9313i
RO
RO
DEFAULT
Datasheet
0b
0b
0b
0b
0b
0b
0b
-
-