CS42526-CQZR Cirrus Logic Inc, CS42526-CQZR Datasheet - Page 65

Audio CODECs IC 114dB 192kHz 6Ch Mlt-Ch CODEC

CS42526-CQZR

Manufacturer Part Number
CS42526-CQZR
Description
Audio CODECs IC 114dB 192kHz 6Ch Mlt-Ch CODEC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS42526-CQZR

Number Of Adc Inputs
2
Number Of Dac Outputs
6
Conversion Rate
192 KSPs
Interface Type
Serial (SPI)
Resolution
24 bit
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Minimum Operating Temperature
- 10 C
Number Of Channels
2 ADC, 6 DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS42526-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS585F1
6.20.1 PLL UNLOCK (UNLOCK)
6.20.2 NEW Q-SUBCODE BLOCK (QCH)
6.20.3 D TO E C-BUFFER TRANSFER (DETC)
6.20.4 D TO E U-BUFFER TRANSFER (DETU)
6.20.5 ADC OVERFLOW (OVERFLOW)
6.20.6 RECEIVER ERROR (RERR)
6.21
UNLOCKM
7
Interrupt Mask (address 21h)
Default = 0
Function:
PLL unlock status bit. This bit will go high if the PLL becomes unlocked.
Default = 0
Function:
Indicates when the Q-Subcode block has changed.
Default = 0
Function:
Indicates when the channel status buffer has changed.
Default = 0
Function:
Indicates when the user status buffer has changed.
Default = 0
Function:
Indicates that there is an over-range condition anywhere in the CS42526 ADC signal path.
Default = 0
Function:
Indicates that a receiver error has occurred. The register
on page 68
Default = 00000000
Function:
The bits of this register serve as a mask for the interrupt sources found in the register
(address 20h) (Read Only)” on page
its occurrence will affect the INT pin and the status register. If a mask bit is set to 0, the error is
masked, meaning that its occurrence will not affect the INT pin or the status register. The bit positions
align with the corresponding bits in the Interrupt Status register.
Reserved
6
may be read to determine the nature of the error which caused the interrupt.
QCHM
5
DETCM
4
64. If a mask bit is set to 1, the error is unmasked, meaning that
DETUM
3
“Receiver Errors (address 26h) (Read Only)”
Reserved
2
OverFlowM
1
“Interrupt Status
CS42526
RERRM
0
65

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