CYII4SM014KAA-GECU Cypress Semiconductor Corp, CYII4SM014KAA-GECU Datasheet - Page 5

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CYII4SM014KAA-GECU

Manufacturer Part Number
CYII4SM014KAA-GECU
Description
IC IMAGE SENSOR 14MP CMOS 49-PGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYII4SM014KAA-GECU

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Architecture and Operation
Floor Plan
The architecture of the sensor is shown in the
Y-shift registers point at a row of imager arrays. The imager
arrays row is selected by the row drivers or reset by them. There
are two Y-shift registers, one points to the row that is read out
and the other points to the row to be reset. The second pointer
may lead the first pointer by a specific number of rows. In that
case, the time difference between both pointers is the integration
time. Alternatively, both shift registers can point at the same row
for reset and readout for a faster reset sequence. When the row
is read out, it is also reset. This is to do double sampling for FPN
reduction.
Figure 2. IBIS4-14K Block Diagram
Document #: 38-05709 Rev. *F
SYNC_YL
CLK_YL
SYNC_X
CLK_X
SHR
SHS
Figure
4560 x 3048 active pixels
3048 column amplifiers
x-shift register
2. The
pixel array
The pixel array of the IBIS4-14000 consists of 4536 × 3024
active pixels and 24 additional columns and rows which can be
addressed (see
pixel information and perform the double sampling operation.
They also multiplex the signals on the readout buses, which are
buffered by the output amplifiers.
The shift registers can be configured for various subsampling
modes. The output amplifiers can be individually powered down
and some other additional functions are available. These options
are configurable using a serial input port.
Pixel (0,0)
Figure
3). The column amplifiers read out the
CLK_YR
SYNC_YR
CYII4SM014KAA
analog
outputs
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