MT9V125IA7XTC Aptina LLC, MT9V125IA7XTC Datasheet
MT9V125IA7XTC
Specifications of MT9V125IA7XTC
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MT9V125IA7XTC Summary of contents
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... Packaging Ordering Information Table 2: Available Part Numbers Part Number MT9V125IA7XTC MT9V125I77XTC MT9V125D00XTC K12BC1 Bare die MT9V125IA7XTCD ES MT9V125IA7XTCH ES MT9V125IA7XTCR ES Micron Technology, Inc., reserves the right to change products or specifications without notice. 1 Features Value 1/4-inch (4:3) 3.63mm(H) x 2.78mm(V) 4.57mm diagonal 640H x 480V 720H x 486V 720H x 576V 5.6µ ...
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General Description The MT9V125 is a VGA CMOS image sensor featuring Micron’s breakthrough DigitalClar- ity technology—a low-noise CMOS imaging technology that achieves CCD image quality (based on signal-to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost, low power, ...
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Functional Overview The MT9V125 is a fully-automatic, single-chip camera, requiring only a single power supply, lens, and clock source for basic operation. Output video is streamed via the cho- sen output port. The MT9V125 internal registers are configured using a ...
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Figure 3 shows a typical application using a DSP to produce a video overlay (such as a steering aid). The parallel digital video output is sent to the DSP, which adds the overlay. The digital video with the overlay is ...
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Typical Connections Figure 4 shows a detailed MT9V125 device configuration. For low-noise operation, the MT9V125 requires separate analog and digital power supplies. Incoming digital and ana- log ground conductors can be tied together next to the die. Power supply voltages ...
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Ball Assignments Figure 5 shows the location of the balls and their corresponding signals on the MT9V125. The 12 balls in the middle of the package are unconnected. Figure 5: 52-Ball iBGA Assignment ...
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Table 4: Ball Descriptions (continued) Ball Assignment Name H4 LVDS_ENABLE A2, B1, B2, C1, D [7:0] IN C2, D2, E2 DIN_CLK H2 S DATA F7, E7, B3, A3, D [7:0] OUT B4, A4, B5 _LSB0 ...
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Detailed Architecture Overview Sensor Core The sensor consists of a pixel array of 695 x 512, an analog readout chain, 10-bit ADC with programmable gain and black offset, and timing and control, as illustrated in Figure 6. Figure 6: Sensor ...
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Figure 7: Image Capture Example IMAGE SENSOR (Rear view) Start Rasterization The sensor core uses a paired RGB Bayer color pattern, as shown in Figure 8 on page 10. Row pairs consist of the following: rows 0, 1, rows 2, ...
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Figure 8: Pixel Color Pattern Detail (top right corner) Row Readout Direction Output Data Format The sensor core image data is read out in an interlaced scan order. Progressive readout— which is not supported by the color pipe—is an option, ...
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Figure 9: Spatial Illustration of Image Readout P 0,0 P 2,0 P m-2 ..................................... ..................................... ..................................... ..................................... ...
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Image Flow Processor The MT9V125 IFP consists of a color processing pipeline, and a measurement and con- trol logic block (the camera controller). The stream of raw data from the sensor enters the pipeline and undergoes several transformations. Image stream ...
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Defect Correction This device supports 2D defect correction defect detection/correction, pixels with values different from their neighbors by greater than a defined threshold are considered defects unless near the image boundary. The approach is termed 2D, as pixels ...
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Automatic Flicker Abatement Flicker occurs when integration time is not an integer multiple of the period of the light intensity. The automatic flicker abatement block eliminates flicker by limiting exposure times to integer multiples of the light period. Gamma Correction ...
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I/O Timing Digital Output By default, the MT9V135 launches pixel data, FV, and LV synchronously with the falling edge of PIXCLK. The expectation is that the user captures data, FV, and LV using the rising edge of PIXCLK. The timing ...
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Electrical Specifications Table 6: Electrical Characteristics and Operating Conditions T = Ambient = 25°C; All supplies at 2. Parameter I/O and core digital voltage ( LVDS PLL voltage Video DAC voltage Analog voltage ( ...
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Table 8: Digital I/O Parameters T = Ambient = 25°C; All supplies at 2.8V A Signal Type Parameter Definition All Load capacitance Outputs Output signal slew V Output high voltage OH V Output low voltage OL I Output high current ...
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NTSC Signal Parameters Table 10: NTSC Signal Parameters T = Ambient = 25°C; All supplies at 2.8V A Parameter Condition Line Frequency Field Frequency Sync Rise Time Sync Fall Time Sync Width Sync Level Burst Level Sync to Setup (with ...
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Package and Die Dimensions Figure 11: 52-Ball iBGA Package Outline Drawing D Seating plane A 0.10 A 7.00 52X Ø0.55 Dimensions apply 1.00 TYP to solder balls post- reflow. The pre- Ball A8 reflow diameter is Ø0. Ø0.40 ...