ADAU1445YSVZ-3A-RL Analog Devices Inc, ADAU1445YSVZ-3A-RL Datasheet - Page 15

• Manufacturer Part Number: ADAU1445YSVZ-3A-RL
• Description: 175MHZ SigmaDSP,2x8 SRCs
• Manufacturer: Analog Devices Inc
• Series: SigmaDSP®r
• Type: Audio Processorr

Specifications of ADAU1445YSVZ-3A-RL

• Applications: Automotive Audio
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Format: Fixed Point
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THEORY OF OPERATION
SYSTEM BLOCK DIAGRAM
FRAME CLOCK
*SPI/I
†
THERE ARE 12 BIT CLOCKS (BCLK[11:0]) AND 12 FRAME CLOCKS (LRCLK[11:0]) IN TOTAL. OF THE 12 CLOCKS,
SIX ARE ASSIGNABLE, THREE MUST BE OUTPUTS, AND THREE MUST BE INPUTS.
BIT CLOCK
DIGITAL AUDIO
SDATA_IN[8:0]
2
(24-CHANNEL
(LRCLK)
C = THE ADDR0, CLATCH, SCL/CCLK, SDA/COUT, AND ADDR1/CDATA PINS.
(BCLK)
INPUT)
SPDIFI
†
†
3 TO 9
3 TO 9
9
ADAU1445/
ADAU1446
SERIAL DATA
INPUT PORT
RECEIVER
1.8V REGULATOR
S/PDIF
(×9)
9
+3.3V VDRIVE
DVDD
6
DGND
RESET
RESET
8
SPI/I
I
AND SELF-BOOT
2
AVDD
C/SPI CONTROL
2
Figure 8. System Block Diagram
INTERFACE
5
C* SELFBOOT
PROGRAMMABLE AUDIO
UP TO 16 CHANNELS OF
170ms DELAY MEMORY
Rev. A | Page 15 of 92
PROCESSOR CORE,
28-/56-BIT, 172MHz
ASYNCHRONOUS
SERIAL CLOCK
SAMPLE RATE
CONVERTERS
DOMAINS
AGND
(×12)
MP[11:4]
MP
8
ADC[3:0]
4
MP[3:0]/
AUXILIARY
IOVDD
ADC
4
8
4
PLL[2:0] PLL_FILT
PVDD
3
PLL
PGND
TRANSMITTER
OUTPUT PORT
SERIAL DATA
S/PDIF
OSCILLATOR
ADAU1445/ADAU1446
XTALI, XTALO
(×9)
OUTPUT
CLOCK
CLOCK
9
2
3 TO 9
3 TO 9
2
9
CLKMODE[1:0]
CLKOUT
SPDIFO
SDATA_OUT[8:0]
(24-CHANNEL
DIGITAL AUDIO
OUTPUT)
BIT CLOCK
(BCLK)
FRAME CLOCK
(LRCLK)
†
†