KSZ8041RNL-EVAL Micrel Inc, KSZ8041RNL-EVAL Datasheet - Page 13

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KSZ8041RNL-EVAL

Manufacturer Part Number
KSZ8041RNL-EVAL
Description
BOARD EVALUATION FOR KSZ8041RNL
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8041RNL-EVAL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3863
Pin Differences Between KSZ8041RNL and KSZ8051RNL
This section provides information about pin changes for migrating board designs from the KSZ8041RNL to the
KSZ8051RNL.
Table 15 identifies the pin differences between the KSZ8041RNL and the KSZ8051RNL. Changes are shown underlined.
Pins that are not listed are the same for both products.
Micrel, Inc.
Pin
Number
2
11
17
19
21
26
27
December 2010
Pin Name
VDDPLL_1.8
MDIO
VDDIO_3.3
REF_CLK
INTRP
NC
NC
P
Opu
Type
I/O
P
O
I
I
KSZ8041RNL
Pin Function
1.8V analog VDD
Management Interface (MII)
Data I/O
This pin requires an external
4.7KΩ pull-up resistor.
3.3V digital VDD
50MHz Clock Output
This pin provides the 50MHz
RMII reference clock output
to the MAC.
Interrupt Output:
Interrupt Output
Register 1Bh is the Interrupt
Control/Status Register for
programming the interrupt
conditions and reading the
interrupt status. Register
1Fh bit 9 sets the interrupt
output to active low (default)
or active high.
No connect
No connect
Programmable
13
Pin Name
VDD_1.2
MDIO
VDDIO
REF_CLK /
B-CAST_OFF
INTRP /
NAND_Tree#
NC
NC
Type
P
I/O
P
Ipd/O
Ipu/Opu
I
I
KSZ8051RNL
1.2V core VDD
supplied by KSZ8051MNL)
Decouple with 2.2μF and
0.1μF capacitors to ground.
Management Interface (MII)
Data I/O
This pin has a weak pull-up, is
open drain like, and requires
an external 1.0KΩ pull-up
resistor.
RMII Mode: 25MHz Mode:
This pin provides the 50MHz
RMII reference clock
output to the MAC. See also
XI (pin 9).
50MHz Mode: This pin is a no
connect. See also XI (pin 9).
Config Mode: The pull-up/pull-
down value is latched as B-
CAST_OFF at the de-assertion
of reset.
assertion of reset. See
“Strapping Options” section for
details.
Interrupt Output:
Interrupt Output
This pin has a weak pull-up, is
open drain like, and requires
an external 1.0KΩ pull-up
resistor.
Config Mode: The pull-up/pull-
down value is latched as
NAND Tree# at the de-
assertion of reset.
See “Strapping Options”
section for details.
No connect- It is
recommended to tie this
unused pin directly to ground.
No connect- It is
recommended to tie this
unused pin directly to ground.
Pin Function
3.3V, 2.5V or 1.8V digital VDD
Application Note 143
Programmable
de-assertion of reset.
M9999-120610-A
(power
de-

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