CMD-12DP512 AXIOM, CMD-12DP512 Datasheet - Page 6

• Manufacturer Part Number: CMD-12DP512
• Description: Single Board Computer
• Manufacturer: AXIOM

Specifications of CMD-12DP512

• Silicon Manufacturer: Freescale
• Core Architecture: HCS12
• Core Sub-architecture: S12D
• Features: Onboard Back Ground Debug, Breadboard And Prototype Area
• Kit Contents: Board
• Silicon Family Name: S12D
• Silicon Core Number: MC9S12DP512

C M D - 1 2 D P 5 1 2
TARGET MEMORY OPTION TABLE
This table provides a quick reference for software and hardware settings for the different target
memory maps. Relocating the HCS12 internal EEprom, Internal Ram, and Register space is
not provided here.
projects for more details.
1) Single-Chip
2) Expanded with Flash
3) Expanded without Flash
4) Expanded w/ Paging
1) The NO_AUTO option should be OFF when applying AXIDE4 or a BDM.
2) Single-chip mode provides all the HCS12 I/O ports including ports A and B for application.
3) Expand Mode allows external memory (board memory) access. HCS12 I/O ports A, B, and
4) In Expanded Mode the Flash may be optioned in the MISC register to be Off (not present)
5) Expanded with Paging operation will apply Port K as an external memory address port, Port
Notes:
Target Memory Type
No external memory space (board memory) is available. Applications must apply flash,
EEprom and internal ram. ECLK output is optioned in the PEAR register, refer to DP512
user manual. Flash is always capable of Program Paging. Flash Low Page appearing in
the 0x4000 – 0x7FFF memory space is always PPAGE 0x3E.
part of port E (ECLK, LSTRB, R/W) are applied for the memory bus. External RAM (board
memory) is available.
or High only (0xC000 – 0xFFFF) with Page space (0x8000 – 0xBFFF per PPAGE register
setting). The Flash Low Page is normally disabled to allow access to external RAM (board
memory). If the Flash is optioned Off, the external RAM (Board memory) will be present in
the Flash memory space if the settings in the table above are provided. The Flash may
only be OFF during BDM application, user applications must reside in Flash memory for
operation without the BDM.
K will not be available for I/O operations. The Flash will always occupy Program Pages
(PPAGE register) 0x20 to 0x3F when enabled. External Ram (Board memory) may occupy
Program Pages not occupied by the Flash. External RAM only provides 16 PPAGES (0x10
– 0x1F for instance) or 256K bytes. External Ram appearing in memory space 0x4000 –
0x7FFF will also be the PPAGE 0x1E page when Expanded Paging with Flash is enabled
or any PPAGE 0x--E page with Flash disabled.
R E V
Refer to the provided default target memory settings in the example
B .
0xE0
Default
0xE0
0xE2
MODE
HCS12 Registers
Default
0xC0
0xC0
0xC0
PEAR
Default
0x0C
0x0F or
0x0F
0x0C
MISC
6
MEM_EN
OFF
ON
ON
ON
CMD-12DP512 Memory Options
ON
ON (BDM)
OFF
(Application)
ON (BDM only)
ON (BDM)
OFF
(Application)
0 8 / 2 3 / 0 7
MODE
ECS
OFF
OFF
OFF
ON