CMD-12DP512 AXIOM, CMD-12DP512 Datasheet - Page 12

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CMD-12DP512

Manufacturer Part Number
CMD-12DP512
Description
Single Board Computer
Manufacturer
AXIOM
Datasheet

Specifications of CMD-12DP512

Silicon Manufacturer
Freescale
Core Architecture
HCS12
Core Sub-architecture
S12D
Features
Onboard Back Ground Debug, Breadboard And Prototype Area
Kit Contents
Board
Silicon Family Name
S12D
Silicon Core Number
MC9S12DP512
C M D - 1 2 D P 5 1 2
COM_SEL Option
COM_SEL provides selection of the P-COM1 RS232 port or the USB BDM virtual COM port
for the HCS12 SCI0 serial port interface. The option may be open to allow user connection of
SCI0 or I/O pins to another applied device. SCI0 is provided from the HCS12 Port S0 and S1
pins.
P_COM2
P_COM2 is a 3 pin Terminal Block that provides the HCS12 SCI1 serial port translated to
RS232 signal levels. A solder cup DB9 style connector may be installed with wires and
connector to apply this channel. JP2 option will isolate the SCI RXD pin from the transceiver.
JP1 – SCI1 Select Option
JP1 provides selection of the P-COM2 RS232 port for RS232 receive path to SCI1. JP2
installed connects the SCI1 RXD port (Port S3) to the P-COM2 RS232 transceiver. HCS12
Ports S2 and S3 provide the SCI1 signals.
CAN PORT
This port provides a CAN Bus interface associated with HCS12 CAN channel 0. The port has
a CAN Transceiver (Philips PCA82C250) capable of up to 1M Baud data rate. The user may
isolate the HCS12 CAN channel 0 RXD signal (port PM0) from the transceiver by CAN_EN
option jumper. Cut-Away option 6 allows further control of the transceiver operation.
USB
P_COM2
P_COM1 Port selection
R E V
1 - TXD
2 - RXD
3 – GND / Common
COM_SEL
B .
COM
USB
12
USB Port selection
COM_SEL
COM
0 8 / 2 3 / 0 7

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