PIC18F2423-I/ML Microchip Technology, PIC18F2423-I/ML Datasheet - Page 28

• Manufacturer Part Number: PIC18F2423-I/ML
• Description: 16KB, Flash, 768bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 QFN 6x6mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2423-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2423/2523/4423/4523
5.3
The LVP bit in Configuration register, CONFIG4L,
enables Single-Supply (Low-Voltage) ICSP Program-
ming. The LVP bit defaults to a ‘1’ (enabled) from the
factory.
If Single-Supply Programming mode is not used, the
LVP bit can be programmed to a ‘0’ and RB5/PGM
becomes a digital I/O pin. However, the LVP bit may only
be programmed by entering the High-Voltage ICSP
mode, where MCLR/V
the LVP bit is programmed to a ‘0’, only the High-Voltage
ICSP mode is available and only the High-Voltage ICSP
mode can be used to program the device.
5.4
To allow portability of code, a PIC18F2423/2523/4423/
4523 programmer is required to read the Configuration
Word locations from the hex file. If Configuration Word
information is not present in the hex file, then a simple
warning message should be issued. Similarly, while sav-
ing a hex file, all Configuration Word information must be
included. An option to not include the Configuration
Word information may be provided. When embedding
Configuration Word information in the hex file, it should
start at address 300000h.
Microchip Technology Inc. feels strongly that this
feature is important for the benefit of the end customer.
5.5
To allow portability of code, a PIC18F2423/2523/4423/
4523 programmer is required to read the data
EEPROM information from the hex file. If data
EEPROM information is not present, a simple warning
message should be issued. Similarly, when saving a
hex file, all data EEPROM information must be
included. An option to not include the data EEPROM
information may be provided. When embedding data
EEPROM information in the hex file, it should start at
address F00000h.
Microchip Technology Inc. believes that this feature is
important for the benefit of the end customer.
DS39759A-page 28
Note 1: The High-Voltage ICSP mode is always
2: While in Low-Voltage ICSP mode, the
Single-Supply ICSP Programming
Embedding Configuration Word
Information in the HEX File
Embedding Data EEPROM
Information In the HEX File
available, regardless of the state of the
LVP bit, by applying V
V
RB5 pin can no longer be used as a
general purpose I/O.
PP
/RE3 pin.
PP
/RE3 is raised to V
IHH
to the MCLR/
IHH
. Once
5.6
The checksum is calculated by summing the following:
• The contents of all code memory locations
• The Configuration Words, appropriately masked
• ID locations (if any block is code-protected)
The Least Significant 16 bits of this sum is the
checksum. The contents of the data EEPROM are not
used.
5.6.1
When program memory contents are summed, each
16-bit word is added to the checksum. The contents of
program memory from 000000h to the end of the last
program memory block are used for this calculation.
Overflows from bit 15 may be ignored.
5.6.2
For checksum calculations, unimplemented bits in
Configuration Words should be ignored as such bits
always read back as ‘1’s. Each 8-bit Configuration
Word is ANDed with a corresponding mask to prevent
unused bits from affecting checksum calculations.
The mask contains a ‘0’ in unimplemented bit positions,
or a ‘1’ where a choice can be made. When ANDed
with the value read out of a Configuration Word, only
implemented bits remain. A list of suitable masks is
provided in Table 5-5.
5.6.3
Normally, the contents of these locations are defined by
the user, but MPLAB
the device’s unprotected 16-bit checksum in the 16 Most
Significant bits of the ID locations (see MPLAB IDE
“Configure/ID Memory” menu). The lower 16 bits are not
used and remain clear. This is the sum of all program
memory
(appropriately masked) before any code protection is
enabled.
If the user elects to define the contents of the ID loca-
tions, nothing about protected blocks can be known. If
the user uses the preprotected checksum provided by
MPLAB IDE, an indirect characteristic of the
programmed code is provided.
5.6.4
Blocks that are code-protected read back as all ‘0’s and
have no effect on checksum calculations. If any block
is code-protected, then the contents of the ID locations
are included in the checksum calculation.
All Configuration Words and the ID locations can
always be read out normally, even when the device is
fully code-protected. Checking the code protection set-
tings in Configuration Words can direct which, if any, of
the program memory blocks can be read and if the ID
locations should be used for checksum calculations.
Checksum Computation
contents
PROGRAM MEMORY
CONFIGURATION WORDS
ID LOCATIONS
CODE PROTECTION
®
IDE provides the option of writing
and
© 2005 Microchip Technology Inc.
Configuration
Words