PIC18F2423-I/ML Microchip Technology, PIC18F2423-I/ML Datasheet - Page 23

• Manufacturer Part Number: PIC18F2423-I/ML
• Description: 16KB, Flash, 768bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 QFN 6x6mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2423-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 4-4:
4.5
A data EEPROM address may be read via a sequence
of core instructions (4-bit command, ‘0000’) and then
output on PGD via the 4-bit command, ‘0010’ (TABLAT
register). The result may then be immediately
compared to the appropriate data in the programmer’s
memory for verification. Refer to Section 4.4 “Read
Data EEPROM Memory” for implementation details of
reading data EEPROM.
4.6
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory, data EEPROM, ID locations
and Configuration bits. The Device ID registers
(3FFFFEh:3FFFFFh) should be ignored.
A “blank” or “erased” memory cell will read as a ‘1’.
Therefore, Blank Checking a device merely means to
verify that all bytes read as FFh except the Configuration
bits. Unused (reserved) Configuration bits will read ‘0’
(programmed). Refer to Table 5-1 for blank configuration
expect data for the various PIC18F2423/2523/4423/
4523 devices.
Given that Blank Checking is merely code and data
EEPROM verification with FFh expect data, refer to
Section 4.4 “Read Data EEPROM Memory” and
Section 4.2 “Verify Code Memory and ID Locations”
for implementation details.
© 2005 Microchip Technology Inc.
PGC
PGD
Verify Data EEPROM
Blank Check
1
0
2
1
3
0
SHIFT OUT DATA HOLDING REGISTER TIMING (0010)
4
0
P5
PGD = Input
1
2
3
4
PIC18F2423/2523/4423/4523
5
6
7
8
P6
9
FIGURE 4-5:
LSb
P14
10
1
11
2
PGD = Output
Blank Check Device
12
Shift Data Out
3
13
device
blank?
4
Abort
Start
Is
14
5
No
15
BLANK CHECK FLOW
6
16
MSb
P5A
Yes
Fetch Next 4-Bit Command
1
n
PGD = Input
2
DS39759A-page 23
Continue
n
3
n
4
n