MPC8572EAMC Freescale Semiconductor, MPC8572EAMC Datasheet - Page 20

• Manufacturer Part Number: MPC8572EAMC
• Description: MPC8572 AMC RAPID SYSTEM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8572EAMC

• Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MPC8572E

Controls and Indicators
4.1
Figure 4-1
Table 4-1
position, the value of the switch is zero. For a detailed description of the bits and fields, refer to the
Section 4.4.3, “Power-On Reset Configuration” in the MPC8572E PowerQUICC™ III Integrated Host
Processor Family Reference Manual, Revision 2.
4-2
SW500.1
SW500.2
SW500.3
Feature
SW4.1
SW4.2
SW4.3
SW4.4
SW5.1
SW5.2
SW5.3
SW5.4
SW5.5
SW5.6
SW5.7
SW5.8
[OFF = 1, ON = 0)
Default Settings
DIP Switch Settings
describes the possible settings of all DIP switches on the boards. Note that when in the “ON”
shows the location of the DIP switches on the board and their default (factory) position.
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2
Reserved
Reserved
Reserved
[SW4.4] = MMC H/W Select. ON—MMC present
[SW4.4] = MMC H/W Select. OFF—MMC not present
[SW5.1:2] = ON:ON. CCB:SYSCLK = 4:1 (266 MHz)
[SW5.1:2] = OFF:ON. CCB:SYSCLK = 8:1 (533 MHz)
[SW5.1:2] = ON:OFF. CCB:SYSCLK = 10:1 (666 MHz)
[SW5.1:2] = OFF:OFF. CCB:SYSCLK = 12:1 (800 MHz)
[SW5.3:4] = ON:ON. e500 Core #0:CCB = 1.5:1
[SW5.3:4] = OFF:ON. e500 Core #0:CCB = 2:1
[SW5.3:4] = ON:OFF. e500 Core #0:CCB = 2.5:1
[SW5.3:4] = OFF:OFF. e500 Core #0:CCB = 3.5:
[SW5.5:6] = ON:ON. e500 Core #1:CCB = 1.5:1
[SW5.5:6] = OFF:ON. e500 Core #1:CCB = 2:1
[SW5.5:6] = ON:OFF. e500 Core #1:CCB = 2.5:1
[SW5.5:6] = OFF:OFF. e500 Core #1:CCB = 3.5:1
[SW5.7:8] = ON:ON. Boot ROM Location = PCI-Express
[SW5.7:8] = OFF:ON. Boot ROM Location = Serial RapidIO
[SW5.7:8] = ON:OFF. Boot ROM Location = DDR Memory
[SW5.7:8] = OFF:OFF. Boot ROM Location = 32-bit Local FLASH Memory
[SW500.1:3]=ON:ON:ON.DDR Clock Ratio = 3:1 DDRCLK (200 MHz)
[SW500.1:3]=OFF:ON:ON.DDR Clock Ratio = 4:1 DDRCLK (266 MHz)
[SW500.1:3]=ON:OFF:ON.DDR Clock Ratio = 6:1 DDRCLK (400 MHz)
[SW500.1:3]=OFF:OFF:ON.DDR Clock Ratio = 8:1 DDRCLK (533 MHz)
[SW500.1:3]=ON:ON:OFF.DDR Clock Ratio = 10:1 DDRCLK (666 MHz)
[SW500.1:3]=OFF:ON:OFF.DDR Clock Ratio = 12:1 DDRCLK (800 MHz)
[SW500.1:3]=ON:OFF:OFF. RESERVED
[SW500.1:3]=OFF:OFF:OFF.DDR Clock Ratio = SYNCHRONOUS
Table 4-1. MPC8572EAMC DIP Switch Listing
SW500
SW4
SW5
Comments
1
1
1
1
Freescale Semiconductor
1
1