ISL6267HRZ Intersil, ISL6267HRZ Datasheet - Page 29

• Manufacturer Part Number: ISL6267HRZ
• Description: IC PWM CTRLR MULTIPHASE 48TQFN
• Manufacturer: Intersil

Specifications of ISL6267HRZ

• Applications: Converter, AMD Fusion™ CPU GPU
• Voltage - Input: 4.75 V ~ 5.25 V
• Number Of Outputs: 2
• Voltage - Output: 0.0125 V ~ 1.55 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ISL6267
6, 7, 8
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
9
SVD, PWROK, SVC
PGOOD_NB
COMP_NB
SYMBOL
FB2_NB
ENABLE
VR_HOT
VW_NB
PGOOD
FB_NB
COMP
ISEN3
ISEN2
ISEN1
VSEN
NTC
FB2
RTN
VW
FB
29
TABLE 9. LAYOUT CONSIDERATIONS FOR THE ISL6267 CONTROLLER
Place the compensator components (R25, R9, R24, C88, C51, C86, and C153) close to the controller.
Place the capacitor (C85) across VW, and place COMP close to the controller.
No special consideration.
Use good signal integrity practices.
No special consideration.
No special consideration.
No special consideration.
Place the NTC thermistor (R46) close to the thermal source that is monitored to determine CPU V
throttling. Usually it is placed close to Core VR phase-1 high-side MOSFET.
Place the capacitor (C4) across VW and COMP close to the controller.
Place the compensator components (R7, R10, R11, C3, C6, C11 and C5) in general proximity to the controller.
Each ISEN pin has a capacitor (C
GND. Place Cisen capacitors as close as possible to the controller and keep the following loops small:
The red traces in the following drawing show the loops to be minimized.
Place the VSEN/RTN filter (C12, C13) close to the controller for good decoupling.
1. Any ISEN pin to another ISEN pin
2. Any ISEN pin to GND
ISEN3
ISEN2
ISEN1
ISL6267
GND
isen
Cisen
Cisen
Cisen
) decoupling it to VSUMN and then through another capacitor (C
Vsumn
LAYOUT GUIDELINES
Phase1
Phase2
Phase3
Cvsumn
Risen
Risen
Risen
L3
L2
L1
(Continued)
Ro
Ro
Ro
V o
January 31, 2011
CORE
vsumn
thermal
FN7801.0
) to