MC56F8255VLD Freescale Semiconductor, MC56F8255VLD Datasheet - Page 11

DSC 64K FLASH 60MHZ 44-LQFP

MC56F8255VLD

Manufacturer Part Number
MC56F8255VLD
Description
DSC 64K FLASH 60MHZ 44-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8255VLD

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
35
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC56F8255VLD
Manufacturer:
FREESCALE
Quantity:
2 000
Part Number:
MC56F8255VLD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8255VLD
Manufacturer:
FREESCALE
Quantity:
2 000
2.5.9
2.5.10
2.5.11
2.5.12
Freescale Semiconductor
Two inter-integrated circuit (I
— Operation at up to 400 kbps
— Support for master and slave operation
— Support for 10-bit address mode and broadcasting mode
— Support for SMBus, version 2
One Freescale Scalable Controller Area Network (MSCAN) module
— Fully compliant with CAN protocol version 2.0 A/B
— Support for standard and extended data frames
— Support for data rate up to 1 Mbps
— Five receive buffers and three transmit buffers
Computer operating properly (COP) watchdog timer capable of selecting different clock sources
— Programmable prescaler and time-out period
— Programmable wait, stop, and partial power-down mode operation
— Causes loss of reference reset 128 cycles after loss of reference clock to the PLL is detected
— Choice of three clock sources:
Power supervisor (PS)
— On-chip linear regulator for digital and analog circuitry to lower cost and reduce noise
— Integrated low-voltage detection to generate warning interrupt if V
— Integrated power-on reset (POR)
— Integrated brown-out reset
— Run, wait, and stop modes
– On-chip relaxation oscillator
– External crystal oscillator/external clock source
– System clock (IP bus to 60 MHz)
detection (LVI) threshold
– Reliable reset process during power-on procedure
– POR is released after V
I
MSCAN
COP
PS
2
C
MC56F825x/MC56F824x Product Brief, Rev. 2
2
DD
C) ports
passes low voltage detection (LVI) threshold
Preliminary
DD
is below low-voltage
Features
11

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