HV9910BLG-G Supertex, HV9910BLG-G Datasheet - Page 4

• Manufacturer Part Number: HV9910BLG-G
• Description: LED Drivers UNIVRSL HI BRGHTNES LED DRIVER
• Manufacturer: Supertex

Specifications of HV9910BLG-G

• Low Level Output Current: 165000 uA (Min)
• High Level Output Current: 165000 uA (Min)
• Operating Supply Voltage: 8 V to 450 V
• Maximum Power Dissipation: 630 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8 Narrow
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage (typ): 9/12/15/18/24V
• Operating Temperature (min): -40C
• Operating Temperature (max): 150C
• Operating Temperature Classification: Automotive
• Package Type: SOIC N
• Pin Count: 8
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Application Information
The HV9910B is optimized to drive buck LED drivers using
open-loop peak current mode control. This method of control
enables fairly accurate LED current control without the need
for high side current sensing or the design of any closed loop
controllers. The IC uses very few external components and
enables both Linear and PWM dimming of the LED current.
A resistor connected to the RT pin programs the frequency
of operation (or the off-time). The oscillator produces pulses
at regular intervals. These pulses set the SR flip-flop in the
HV9910B which causes the GATE driver to turn on. The same
pulses also start the blanking timer which inhibits the reset
input of the SR flip flop and prevent false turn-offs due to the
turn-on spike. When the FET turns on, the current through
the inductor starts ramping up. This current flows through
the external sense resistor R
at the CS pin. The comparators are constantly comparing
the CS pin voltage to both the voltage at the LD pin and
the internal 250mV. Once the blanking timer is complete, the
output of these comparators is allowed to reset the flip flop.
When the output of either one of the two comparators goes
high, the flip flop is reset and the GATE output goes low. The
GATE goes low until the SR flip flop is set by the oscillator.
Assuming a 30% ripple in the inductor, the current sense
resistor R
Constant frequency peak current mode control has an in-
herent disadvantage – at duty cycles greater than 0.5, the
control scheme goes into subharmonic oscillations. To pre-
vent this, an artificial slope is typically added to the current
sense waveform. This slope compensation scheme will af-
fect the accuracy of the LED current in the present form.
However, a constant off-time peak current control scheme
does not have this problem and can easily operate at duty
cycles greater then 0.5 and also gives inherent input volt-
age rejection making the LED current almost insensitive to
input voltage variations. But, it leads to variable frequency
operation and the frequency range depends greatly on the
input and output voltage variation. HV9910B makes it easy
to switch between the two modes of operation by changing
one connection (see oscillator section).
Input Voltage Regulator
The HV9910B can be powered directly from its VIN pin and
can work from 8.0 - 450VDC at its VIN pin. When a voltage
is applied at the VIN pin, the HV9910B maintains a constant
7.5V at the VDD pin. This voltage is used to power the IC
R
CS
CS
can be set using:
=
Supertex inc.
0.25V (or V
1.15 • I
LED
(A)
LD
)
CS
and produces a ramp voltage
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
4
and any external resistor dividers needed to control the IC.
The VDD pin must be bypassed by a low ESR capacitor to
provide a low impedance path for the high frequency current
of the output GATE driver.
The HV9910B can also be operated by supplying a voltage
at the VDD pin greater than the internally regulated voltage.
This will turn off the internal linear regulator of the IC and the
HV9910B will operate directly off the voltage supplied at the
VDD pin. Please note that this external voltage at the VDD
pin should not exceed 12V.
Although the VIN pin of the HV9910B is rated up to 450V,
the actual maximum voltage that can be applied is limited
by the power dissipation in the IC. For example, if an 8-pin
SOIC (junction to ambient thermal resistance R
W) HV9910B draws about I
has a maximum allowable temperature rise of the junction
temperature limited to about ΔT = 100°C, the maximum volt-
age at the VIN pin would be:
In these cases, to operate the HV9910B from higher input
voltages, a Zener diode can be added in series with the VIN
pin to divert some of the power loss from the HV9910B to
the Zener diode. In the above example, using a 100V zener
diode will allow the circuit to easily work up to 450V.
The input current drawn from the VIN pin is a sum of the
1.0mA current drawn by the internal circuit and the current
drawn by the GATE driver (which in turn depends on the
switching frequency and the GATE charge of the external
FET).
In the above equation, f
is the GATE charge of the external FET (which can be ob-
tained from the datasheet of the FET).
I
IN
≈ 1.0mA + Q
●
Tel: [phone]
G
S
• f
is the switching frequency and Q
S
IN
●
= 2.0mA from the VIN pin, and
www.supertex.com
HV9910B
θ,j-a
= 128°C/
G