DS90UR905QSQ/NOPB National Semiconductor, DS90UR905QSQ/NOPB Datasheet - Page 36

• Manufacturer Part Number: DS90UR905QSQ/NOPB
• Description: IC SER/DESERIAL 24BIT 48LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of DS90UR905QSQ/NOPB

• Function: Serializer
• Data Rate: 1.82Gbps
• Input Type: Parallel
• Output Type: Serial
• Number Of Inputs: 24
• Number Of Outputs: 1
• Voltage - Supply: 1.71 V ~ 1.89 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-WFQFN, Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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(dec)
ADD
0
1
2
(hex)
ADD
0
1
2
Register Name
Des Config 1
Slave ID
Des Features 1
TABLE 15. DESERIALIZER — Serial Bus Control Registers
Bit(s)
3:2
6:0
5:4
2:0
7
6
5
4
1
0
7
7
6
3
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Defa
(bin)
1110
000
ult
00
00
00
0
0
0
0
0
0
0
0
0
0
Function
LFMODE
OS_PCLK
OS_DATA
RFB
CONFIG
SLEEP
REG Control
ID[X]
OP_LOW
Release/Set
OSS_SEL
MAP_SEL
OP_LOW strap
bypass
OSC_SEL
36
Description
0: 20 to 65 MHz Operation
1: 5 to 20 MHz Operation
0: Normal PCLK Output Slew
1: Increased PCLK Slew
0: Normal DATA OUTPUT Slew
1: Increased Data Slew
0: Data strobed on Falling edge of PCLK
1: Data strobed on Rising edge of PCLK
00: Normal Mode, Control Signal Filter Disabled
01: Normal Mode, Control Signal Filter Enabled
10: Backwards Compatible (DS90UR241)
11: Backwards Compatible (DS90C241)
Note – not the same function as PowerDown (PDB)
0: normal mode
1: Sleep Mode – Register settings retained.
0: Configurations set from control pins / STRAP pins
1: Configurations set from registers (except I2C_ID)
0: Address from ID[X] Pin
1: Address from Register
Serial Bus Device ID, Four IDs are:
7b '1110 001 (h'71)
7b '1110 010 (h'72)
7b '1110 011 (h'73)
7b '1110 110 (h'76)
All other addresses are Reserved.
0: set outputs state LOW (except LOCK)
1: release output LOW state, outputs toggling normally
Note: This register only works during LOCK = 1.
Output Sleep State Select
0: PCLK/RGB[7:0]/HS/VS/DE = L, LOCK = Normal,
PASS = H
1: PCLK/RGB[7:0]/HS/VS/DE = Tri-State, LOCK =
Normal, PASS = H
Special for Backwards Compatible Mode
00: bit 4, 5 on LSB
01: LSB zero if all data is zero; one if any data is one
10: LSB zero
11: LSB zero
0: strap will determine whether OP_LOW feature is ON
or OFF
1: Turns OFF OP_LOW feature
000: OFF
001: 50 MHz ±40%
010: 25 MHz ±40%
011: 16.7 MHz ±40%
100: 12.5 MHz ±40%
101: 10 MHz ±40%
110: 8.3 MHz ±40%
111: 6.3 MHz ±40%