DS90UB901QSQX/NOPB National Semiconductor, DS90UB901QSQX/NOPB Datasheet - Page 29

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DS90UB901QSQX/NOPB

Manufacturer Part Number
DS90UB901QSQX/NOPB
Description
IC SER/DESER 10-43MHZ 16B 32LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90UB901QSQX/NOPB

Function
Serializer
Data Rate
688Mbps
Input Type
LVCMOS
Output Type
CML
Number Of Inputs
1
Number Of Outputs
1
Voltage - Supply
1.71 V ~ 1.89 V, 3 V ~ 3.6 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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SLAVE CLOCK STRETCHING
In order to communicate and synchronize with remote de-
vices on the I
slave clock stretching must be supported by the I
controller/MCU. The chipset utilizes bus clock stretching
(holding the SCL line low) during data transmission; where
the I
every I
device will not control the clock and only stretches it until the
remote peripheral has responded; which is typically in the or-
der of 12 us (typical).
2
C slave pulls the SCL line low prior to the 9th clock of
2
C data transfer (before the ACK signal). The slave
2
C bus through the bidirectional control channel,
FIGURE 25. START and STOP Conditions
FIGURE 24. Basic Operation
2
C master
FIGURE 23. Read Byte
29
ID[X] ADDRESS DECODER
The ID[x] pin is used to decode and set the physical slave
address of the Serializer/Deserializer (I
six devices on the bus using only a single pin. The pin sets
one of six possible addresses for each Serializer/Deserializer
device. The pin must be pulled to VDD (1.8V, NOT VDDIO))
with a 10 kΩ resistor and a pull down resistor (RID) of the
recommended value to set the physical device address. The
recommended maximum resistor tolerance is 0.1% worst
case (0.2% total tolerance).
30113542
2
C only) to allow up to
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30113510
30113541

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