TRC101 RFM, TRC101 Datasheet - Page 28

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TRC101

Manufacturer Part Number
TRC101
Description
RFIC TRANCEIVER MULTI-CHANNEL FS
Manufacturer
RFM
Series
TRCr
Datasheet

Specifications of TRC101

Frequency
300MHz ~ 1GHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK
Applications
General Purpose
Power - Output
8dBm
Sensitivity
-105dBm
Voltage - Supply
2.2 V ~ 5.4 V
Current - Receiving
17mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Other names
583-1093-2

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Bit
15
1
Bit
14
0
Power Management Register
The Power Management Register enables/disables the following:
Bit [15..8] – Command Code: These bits are the command code that is sent serially to the processor
that identifies the bits to be written to the Power Management register.
Bit [7] – Receiver Chain Enable: This bit enables the entire receiver chain when set. The receiver chain
comprises the baseband circuit, synthesizer, and crystal oscillator.
Bit [6] – Baseband Circuit Enable: This bit enables the baseband circuit when set. The baseband
circuit, synthesizer, and oscillator work together to demodulate and recover the data transmitted so the
synthesizer (Bit 4) and oscillator (Bit 3) must be enabled at the same time as the baseband circuits in
order to receive data. This bit can be disabled to conserve current consumption.
Bit [5] – Transmit Chain Enable: This bit enables the entire transmit chain when set. The transmit chain
consists of the power amplifier, synthesizer, oscillator, and transmit register. When the transmit chain and
transmit register is enabled, any data in the transmit register is shifted out and transmission is started.
Bit [4] – Synthesizer Enable: This bit enables the synthesizer when set. The synthesizer contains the
PLL, oscillator, and VCO for controlling the channel frequency. This must be enabled when either the
transmitter is enabled or the receiver is enabled. The oscillator also must be enabled to provide the
reference frequency for the PLL. On power-up the synthesizer performs a calibration automatically. If
there are significant changes in voltage or temperature, recalibration can be performed by simply
disabling the synthesizer and re-enabling it.
Bit [3] – Crystal Oscillator: This bit enables the oscillator circuit when set. The oscillator provides the
reference signal for the synthesizer when setting the transmit or receive frequency of use.
Bit [2] – Low Battery Detector: This bit enables the battery voltage detect circuit when set. The battery
detector can be programmed to 32 different threshold levels. See Battery Detect Threshold and Clock
Output Register section for programming.
Bit [1] – Wake-up Timer Enable: This bit enables the wake-up timer when set. See Wake-up Timer
Period Register section for programming the wake-up timer interval value.
Bit [0] – Clock Output Disable: This bit disables the oscillator clock output when set. On chip reset or
power up, clock output is enabled so that a processor may begin execution of any special setup
sequences as required by the designer. See Battery Detect Threshold and Clock Output Register section
for programming details.
NOTE: If this bit is cleared, the oscillator will continue to run even though the Crystal Oscillator Enable bit
(3) is cleared and the device will not fully enter sleep mode.
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©by RF Monolithics, Inc.
Bit
13
0
Bit
12
0
Receiver chain
Transmit Chain
Baseband Circuit
PLL
Power Amplifier
Synthesizer
Crystal Oscillator
Low battery Detect Circuit
Wake-up Timer
Clock Output
Bit
11
0
Email: info@rfm.com
Bit
10
0
Bit
9
1
Bit
8
0
RXEN
[POR=8208h]
Bit
7
BBEN
Bit
6
TXEN
Bit
5
SYNEN
Bit
4
OSCEN
Bit
3
LBDEN
Bit
2
WKUPEN
TRC101 - 4/8/08
Bit
1
Page 28 of 42
CLKDIS
Bit
0

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