TRC101 RFM, TRC101 Datasheet - Page 20

• Manufacturer Part Number: TRC101
• Description: RFIC TRANCEIVER MULTI-CHANNEL FS
• Manufacturer: RFM
• Series: TRCr

Specifications of TRC101

• Frequency: 300MHz ~ 1GHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK
• Applications: General Purpose
• Power - Output: 8dBm
• Sensitivity: -105dBm
• Voltage - Supply: 2.2 V ~ 5.4 V
• Current - Receiving: 17mA
• Current - Transmitting: 28mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Other names: 583-1093-2

Transmit Register
The Transmit Register holds the 8 bits to be transmitted. Bit [7] of the Configuration Register must be set
(logic ‘1’) in order to use this. If Bit [7] is not set, use pin 6 to manually modulate the data.
The initial value on power-up of the register is AAh. This can be used to send a preamble signal by
setting Bit [5] of the Power Management Register (See Figure 5 below). When this bit is set, transmission
begins immediately and the initial value AAh is sent. The SDO pin(4) may be monitored to see when the
next byte of data may be written to the register (SDO is logic ‘1’). It is recommended that the register be
preloaded with a preamble regardless of the POR value.
Bit [15..8] - Command Code: These bits are the command code that is sent serially to the processor that
identifies the bits to be written to the Transmit Register.
Bit [7..0] – Transmit Byte: The data byte to be sent is written here. As soon as the power amplifier is
enabled the data byte is sent. The SDO pin(4) may be monitored to determine when the byte has been
sent.
Sequential Byte Write Method (Recommended)
The transmit register may be continuously accessed by holding the nCS pin (3) ‘Low” for the duration of
the data stream. On the first falling edge of nCS the register command should be issued as normal.
Sequential byte writes to the register afterwards will load the transmit register directly without having to re-
issue the command byte. The SDO pin (4) may be used as a “Transmit Register Empty” flag to write the
next byte. Figure 6 shows the timing sequence.
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Bit
15
1
Bit
14
0
nCS
SCK
SDI
SDO
Bit
13
1
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COMMAND
Bit
12
1
[POR=B8AAh]
Bit
11
1
Figure 6. Sequential Byte Write Timing
Initial Setup
TXEN = 0
FIGURE 5. Initial TX Register Setting
Bit
10
0
DATA BYTE 1
Bit
9
0
Bit
8
0
TX7
Bit
7
DATA BYTE 2
TX6
Bit
6
TX5
Bit
5
TX4
DATA BYTE 3
Bit
4
TX3
Bit
3
TX2
Bit
2
TRC101 - 4/8/08
TX1
Bit
Page 20 of 42
1
TX0
Bit
0