ATZB-24-A2 Atmel, ATZB-24-A2 Datasheet - Page 14

KIT MOD 802.15.4/ZIGB 2.4GHZ ANT

ATZB-24-A2

Manufacturer Part Number
ATZB-24-A2
Description
KIT MOD 802.15.4/ZIGB 2.4GHZ ANT
Manufacturer
Atmel
Datasheets

Specifications of ATZB-24-A2

Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
Home/Building Automation, Industrial Control and Monitoring
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
19mA
Current - Transmitting
18mA
Data Interface
PCB, Surface Mount
Memory Size
128kBytes Flash, 8kBytes RAM, 4kBytes EEPROM
Antenna Connector
On-Board, Chip
Operating Temperature
-40°C ~ 85°C
Package / Case
Module
Tool Type
Wireless Development Kit
Core Architecture
AVR
Cpu Core
AVR 8
Data Bus Width
8 bit
Description/function
ZigBit 2.4 GHz Dual Chip Antenna
Wireless Frequency
2.4 GHz
Interface Type
UART, I2C, SPI
Operating Voltage
1.8 V to 3.6 V
Output Power
3 dBm
Antenna
Chip Antenna
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATZB-24-A2
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATZB-24-A2R
Manufacturer:
CIRRUS
Quantity:
201
7.7
8069Q–AVR–12/10
ATxmega16A4
ATxmega32A4
ATxmega64A4
ATxmega128A4
ATxmega16A4
ATxmega32A4
ATxmega64A4
ATxmega128A4
Devices
Devices
Flash and EEPROM Page Size
128 KB + 8 KB
16 KB + 4 KB
32 KB + 4 KB
64 KB + 4 KB
Flash
Size
EEPROM
The Flash Program Memory and EEPROM data memory are organized in pages. The pages are
word accessible for the Flash and byte accessible for the EEPROM.
Table 7-2 on page 14
operations are performed on one page at a time, while reading the Flash is done one byte at a
time. For Flash access the Z-pointer (Z[m:n]) is used for addressing. The most significant bits in
the address (FPAGE) give the page number and the least significant address bits (FWORD)
give the word in the page.
Table 7-2.
Table 7-3 on page 14
EEPROM write and erase operations can be performed one page or one byte at a time, while
reading the EEPROM is done one byte at a time. For EEPROM access the NVM Address Regis-
ter (ADDR[m:n]) is used for addressing. The most significant bits in the address (E2PAGE) give
the page number and the least significant address bits (E2BYTE) give the byte in the page.
Table 7-3.
Size
1 KB
1 KB
2 KB
2 KB
Page Size
(words)
128
128
128
256
Number of words and Pages in the Flash.
Number of Bytes and Pages in the EEPROM.
Page Size
FWORD
(Bytes)
Z[6:0]
Z[6:0]
Z[6:0]
Z[7:0]
shows the Flash Program Memory organization. Flash write and erase
32
32
32
32
shows EEPROM memory organization for the XMEGA A4 devices.
FPAGE
Z[13:7]
Z[14:7]
Z[15:7]
Z[16:8]
ADDR[4:0]
ADDR[4:0]
ADDR[4:0]
ADDR[4:0]
E2BYTE
128 KB
16 KB
32 KB
64 KB
Size
Application
No of Pages
ADDR[10:5]
ADDR[10:5]
ADDR[10:5]
ADDR[10:5]
E2PAGE
128
128
256
64
4 KB
8 KB
Size
4 KB
4 KB
XMEGA A4
No of Pages
Boot
No of Pages
32
32
64
64
16
16
16
16
14

Related parts for ATZB-24-A2