ADF7025BCPZ Analog Devices Inc, ADF7025BCPZ Datasheet - Page 39

• Manufacturer Part Number: ADF7025BCPZ
• Description: IC ASK/FSK TXRX 928MHZ 48-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADF7025BCPZ

• Frequency: 431MHz ~ 464MHz, 862MHz ~ 870MHz and 902MHz ~ 928MHz
• Data Rate - Maximum: 384kbps
• Modulation Or Protocol: FSK
• Applications: Keyless Entery, Home Automation, Wireless Audio/Video
• Power - Output: -20dBm ~ 13dBm
• Sensitivity: -104dBm
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Receiving: 19mA
• Current - Transmitting: 28mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Receiving Current: 21mA
• Transmitting Current: 19.3mA
• Data Rate: 384Kbps
• Frequency Range: 431MHz To 928MHz
• Modulation Type: FSK
• Rf Ic Case Style: LFCSP
• No. Of Pins: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF70XXEKZ1 - KIT DEV ADF702X FOR BF533EZKITEVAL-ADF7025DBZ1 - BOARD EVAL ADF7025 902-928MHZ
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 12—TEST REGISTER
Using the Test DAC on the ADF7025 to Implement
Analog FM DEMOD and Measuring SNR
The test DAC allows the output of the postdemodulator filter
for both the linear and correlator/demodulators to be viewed
externally. It takes the 16-bit filter output and converts it to a
high frequency, single-bit output using a second-order error
feedback Σ-Δ converter. The output can be viewed on the
XCLK
then be used to
• Monitor the signals at the FSK postdemodulator filter
• Provide analog FM demodulation.
While the correlators and filters are clocked by DEMOD_CLK,
CDR_CLK clocks the test DAC. Note that, although the test
DAC functions in a regular user mode, the best performance is
achieved when the CDR_CLK is increased up to or above the
frequency of DEMOD_CLK. The CDR block does not function
when this condition exists.
output. This allows the demodulator output SNR to be
measured. Eye diagrams can also be constructed of the
received bit stream to measure the received signal quality.
OUT
P
0
1
pin. This signal, when IF-filtered appropriately, can
PRESCALER
4/5 (DEFAULT)
8/9
ANALOG TEST
MUX
CS1
0
1
CAL SOURCE
INTERNAL
SERIAL IF BW CAL
IMAGE FILTER ADJUST
DEFAULT = 32. INCREASE
NUMBER TO INCREASE BW
IF USER CAL ON
Figure 50. Register 12—Test Register
Rev. A | Page 39 of 44
TEST MODES
DIGITAL
Programming the test register, Register 12, enables the test
DAC. Both the linear and correlator/demodulator outputs
can be multiplexed into the DAC.
Register 13 allows a fixed offset term to be removed from the
signal in the case where there is an error in the received signal
frequency. If there is a frequency error in the signal, the user
should program half this value into the offset removal field.
It also has a signal gain term to allow usage of the maximum
dynamic range of the DAC.
Setting Up the Test DAC
•
•
The output of the active demodulator drives the DAC; that is, if
the FSK correlator/demodulator is selected, the correlator filter
output drives the DAC.
CR1
0
1
Digital test modes = 7: enables the test DAC, with no
Digital test modes = 10: enables the test DAC, with
offset removal.
offset removal (0x0001C00C).
COUNTER RESET
DEFAULT
RESET
TEST MODES
Σ-∆
PLL TEST MODES
ADDRESS
BITS
ADF7025