TDA5221 Infineon Technologies, TDA5221 Datasheet - Page 24

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TDA5221

Manufacturer Part Number
TDA5221
Description
RECEIVER SHR FSK/ASK SGL TSSOP28
Manufacturer
Infineon Technologies
Type
Receiverr
Datasheet

Specifications of TDA5221

Package / Case
28-TSSOP
Frequency
300MHz ~ 340MHz
Sensitivity
-113dBm
Data Rate - Maximum
100 kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Current - Receiving
6.2mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Operating Frequency
340 MHz
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000014343
TDA5221
TDA5221INTR
TDA5221XT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA5221
Manufacturer:
INFINEON
Quantity:
276
Part Number:
TDA5221A2
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Part Number:
TDA5221A3
Manufacturer:
INFINEON/英飞凌
Quantity:
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Part Number:
TDA5221B3
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
The time constant T
(see Figure 9) has to be significantly larger than the longest period of no signal change
T
In order to keep distortion low, the minimum value for R is 20k .
T
R1, R
Figure 7
In case of ASK operation another possibility for threshold generation is to use the peak
detector in connection with an internal resistive divider and one capacitor as shown in
the following Figure 8. For selecting the peak detector as reference for the slicing level
a logic low as to be applied on the SSEL pin.
In case of MSEL is high (or open), which means that ASK-Mode is selected, a logic low
on the SSEL pin yields a logic high on the AND-output and thus the peak-detector is
selected (see Figure 9).
In case of FSK the MSEL-pin and furthermore the one input of the AND-gate is low, so
the peak detector can not be selected.
The capacitor value is depending on the coding scheme and the protocol used.
Preliminary Specification
L
A
T
T
and
within the data sequence.
has to be calculated as
A
A
F3 int
R
R
R
1
1
1
, R
(
R
R
R
F4 int
R
1
F
F
Data Slicer Threshold Generation with External R-C Integrator
F
3
3
3
int
R
int
int
and C13 see also Figure 7 and .Figure 9
F
4
data
filter
int
A
R
R
R
of this circuit including also the internal resistors R
F
F
F
4
4
4
int
int
int
)
19
C
C
13
13
20
R
R
1
1
U
24
II
II
threshold
data slicer
(
(
R
R
CM
F
F
3
3
int
int
v
25
R
R
F
F
4
4
int
int
)
)
C
C
13
13
V 1.1, 2004-10-20
F3int
Applications
...
...
TDA 5221
for
for
and R
FSK
ASK
F4int

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