TDA5221 Infineon Technologies, TDA5221 Datasheet - Page 20

• Manufacturer Part Number: TDA5221
• Description: RECEIVER SHR FSK/ASK SGL TSSOP28
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5221

• Package / Case: 28-TSSOP
• Frequency: 300MHz ~ 340MHz
• Sensitivity: -113dBm
• Data Rate - Maximum: 100 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, Remote Control Systems
• Current - Receiving: 6.2mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 340 MHz
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 4.4mm
• Product Length (mm): 9.7mm
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SP000014343; TDA5221; TDA5221INTR; TDA5221XT

AGC and are used to charge an external capacitor which finally generates the LNA gain
control voltage.
Figure 4
The switching point should be chosen according to the intended operating scenario. The
determination of the optimum point is described in the accompanying Application Note,
a threshold voltage level of 1.8V is apparently a viable choice. It should be noted that the
output of the 3VOUT pin is capable of driving up to 50µA, but that the THRES pin input
current is only in the region of 40nA. As the current drawn out of the 3VOUT pin is directly
related to the receiver power consumption, the power divider resistors should have high
impedance values. The sum of R1 and R2 has to be 600k
3VOUT pin. R1 can thus be chosen as 240k , R2 as 360k
output current of 5µA
Note: If the LNA gain shall be kept in either high or low gain mode this has to be
accomplished by tying the THRES pin to a fixed voltage. In order to achieve high gain
mode operation, a voltage higher than 2.8V shall be applied to the THRES pin, such as
a short to the 3VOLT pin. In order to achieve low gain mode operation THRES has to be
connected to GND.
As stated above the capacitor connected to the TAGC pin is generating the gain control
voltage of the LNA due to the charging and discharging currents of the OTA and thus is
also responsible for the AGC time constant. As the charging and discharging currents
are not equal two different time constants will result. The time constant corresponding to
the charging process of the capacitor shall be chosen according to the data rate.
According to measurements performed at Infineon the capacitor value should be greater
than 47nF.
1) note the 20k
Preliminary Specification
2.5
1.5
0.5
3
2
1
0
-120
RSSI Level and Permissive AGC Threshold Levels
resistor in series with the 3.1V internal voltage source
-110
1)
and a threshold voltage of 1.8V
-100
RSSI Level
-90
Input Level at LNA Input [dBm]
-80
20
-70
-60
-50
to yield an overall 3VOUT
in order to yield 3V at the
-40
V 1.1, 2004-10-20
-30
Applications
TDA 5221