MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 538

IC MPU 32BIT COLDF 256-MAPBGA

MCF5216CVF66

Manufacturer Part Number
MCF5216CVF66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5216CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Operating Temperature Range
-40°C To +85°C
No. Of Pins
256
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF521x
Maximum Speed
66 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
142
Interface Type
QSPI/UART/I2C/CAN
On-chip Adc
8-chx10-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Chip Configuration Module (CCM)
27.6.6
The chip select configuration (CS[6:4]) is selected during reset and reflected in the RCSC field of the CCR.
Once reset is exited, the chip select configuration cannot be changed.
select configurations that can be implemented during reset configuration.
27.7
Reset initializes CCM registers to a known startup state as described in
Registers.” The CCM controls chip configuration at reset as described in
Description.”
27.8
The CCM does not generate interrupt requests.
27-10
External clock mode (PLL disabled)
1:1 PLL mode
Normal PLL mode, external clock reference
Normal PLL mode, crystal oscillator reference
Reset
Interrupts
Chip Select Configuration
Clock Mode
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 27-11. Clock Mode Selection
CLKMOD[1:0]
00
01
10
11
Synthesizer Status Register (SYNSR)
PLLSEL
0
0
1
1
Table 27-8
Section 27.5, “Memory Map and
PLLREF
0
0
0
1
Section 27.6, “Functional
shows the different chip
Freescale Semiconductor
PLLMOD
0
1
1
1

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