MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 293

• Manufacturer Part Number: MCF5216CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5216CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Operating Temperature Range: -40°C To +85°C
• No. Of Pins: 256
• Rohs Compliant: No
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The DACRs should be programmed as shown in
This configuration results in a value of DACR0 = 0xFF88_0300, as described in
initialization is not needed because there is only one block. Subsequently, DACR1[RE,IMRS,IP] should
be cleared; everything else is a don’t care.
Freescale Semiconductor
1 Mbyte
Setting
Setting
(hex)
(hex)
Field
Field RE
31–18
17–16
13–12
10–8
31
15
Bits
5–4
15
14
11
7
6
512 Kbyte
512 Kbyte
Bank 0
—
14
Name
CASL
IMRS
CBM
F
BA
RE
PS
—
—
—
—
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
13
CASL
1 Mbyte
1111_1111_
12
1000_10
Figure 15-13. DACR Register Configuration
Setting
011
00
00
Table 15-28. DACR Initialization Values
0
0
Figure 15-12. SDRAM Configuration
—
11
Base address. So DACR0[31–16] = 0xFF88, placing the starting
address of the SDRAM accessible memory at 0xFF88_0000.
Reserved. Don’t care.
Keeps auto-refresh disabled because registers are being set up
at this time.
Reserved. Don’t care.
Indicates a delay of data 1 cycle after SCAS is asserted
Reserved. Don’t care.
Command bit is pin 20 and bank selects are 21 and up.
Reserved. Don’t care.
Indicates
32-bit port.
512 Kbyte
512 Kbyte
10
Bank 1
SDRAM Component
F
CBM
1111_1111_1000_10xx
0000_x011_x000_0000
MRS
Figure
BA
1 Mbyte
command has not been initiated.
8
0300
15-13.
—
7
Description
IMRS
6
512 Kbyte
512 Kbyte
Bank 2
8
5
PS
Synchronous DRAM Controller Module
4
1 Mbyte
Accessible
Memory
IP
3
Table
18
2
512 Kbyte
512 Kbyte
15-28. DACR1
8
Bank 3
—
17
1
—
16
0
15-21