MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 70

IC MCU 8BIT 1K RAM 68-PLCC

MCHC11F1CFNE3

Manufacturer Part Number
MCHC11F1CFNE3
Description
IC MCU 8BIT 1K RAM 68-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MCHC11F1CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
A/d Inputs
8-Channel, 8-Bit
Eeprom Memory
512 Bytes
Input Output
30
Interface
SCI/SPI
Memory Type
EPROM
Number Of Bits
8
Package Type
68-pin PLCC
Programmable Memory
0 Bytes
Timers
3-16-bit
Voltage, Range
3-5.5 V
Controller Family/series
68HC11
No. Of I/o's
30
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC11F
Core
HC11
Data Bus Width
8 bit
Program Memory Size
512 B
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Size
-
Lead Free Status / Rohs Status
RoHS Compliant part

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SMOD — Special Mode Select
MDA — Mode Select A
IRV — Internal Read Visibility
PSEL[3:0] — Priority Select Bits
5.4 Interrupts
5-8
Can be read any time. Can only be written in special modes (SMOD = 1). Can only be
written to zero. Refer to SECTION 4 OPERATING MODES AND ON-CHIP MEMORY
for more information.
Can be read any time. Can only be written in special modes (SMOD = 1). Refer to
SECTION 4 OPERATING MODES AND ON-CHIP MEMORY for more information.
The IRV control bit allows internal read accesses to be available on the external data
bus during operation in expanded modes. In special modes (SMOD = 1), IRV resets
to one (enabled) and can be written any time. In normal modes (SMOD = 0), IRV re-
sets to zero (disabled) and only one write is allowed.
These bits select one interrupt source to be elevated above all other I-bit-related
sources and can only be written while the I bit in the CCR is set (interrupts disabled).
The MCU has 18 interrupt vectors that support 22 interrupt sources. The 15 maskable
interrupts are generated by on-chip peripheral systems. These interrupts are recog-
nized when the global interrupt mask bit (I) in the condition code register (CCR) is
clear. The three non-maskable interrupt sources are illegal opcode trap, software in-
terrupt, and XIRQ pin. Refer to Table 5-4, which shows the interrupt sources and vec-
tor assignments for each source.
PSEL3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
PSEL2
Table 5-3 Highest Priority Interrupt Selection
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Freescale Semiconductor, Inc.
For More Information On This Product,
PSEL1
RESETS AND INTERRUPTS
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Go to: www.freescale.com
PSEL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Timer Overflow
Pulse Accumulator Overflow
Pulse Accumulator Input Edge
SPI Serial Transfer Complete
SCI Serial System
Reserved (Default to IRQ)
IRQ
Real-Time Interrupt
Timer Input Capture 1
Timer Input Capture 2
Timer Input Capture 3
Timer Output Compare 1
Timer Output Compare 2
Timer Output Compare 3
Timer Output Compare 4
Timer Output Compare 5/Input Capture 4
Interrupt Source Promoted
TECHNICAL DATA
MC68HC11F1

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