P89C662HBA/00,512 NXP Semiconductors, P89C662HBA/00,512 Datasheet - Page 33

IC 80C51 MCU FLASH 32K 44-PLCC

P89C662HBA/00,512

Manufacturer Part Number
P89C662HBA/00,512
Description
IC 80C51 MCU FLASH 32K 44-PLCC
Manufacturer
NXP Semiconductors
Series
89Cr
Datasheet

Specifications of P89C662HBA/00,512

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
568-1269-5
935267444512
P89C662HBA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89C662HBA/00,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
2002 Oct 28
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
TCON
*d = 6 in 6-clock mode; d = 12 in 12-clock mode.
Timer n
Gate bit
INTn Pin
BIT
TCON.7
TCON.6
TCON.5
TCON.4
TCON.3
TCON.2
TCON.1
TCON.0
OSC
Address = 88H
Bit Addressable
Tn Pin
SYMBOL
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
TRn
d*
TF1
FUNCTION
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or clearing the bit in software.
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or by clearing the bit in software.
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
Interrupt 0 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
7
Figure 16. Timer/Counter 0/1 Mode 0: 13-Bit Timer/Counter
Figure 17. Timer/Counter 0/1 Control (TCON) Register
TR1
6
C/T = 0
C/T = 1
TF0
5
TR0
4
Control
33
IE1
3
IT1
2
(5 Bits)
P89C660/P89C662/P89C664/
TLn
IE0
1
(8 Bits)
THn
IT0
0
Reset Value = 00H
TFn
SU01618
P89C668
Interrupt
SU01516
Product data

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