ATTINY167-15MD Atmel, ATTINY167-15MD Datasheet - Page 25

• Manufacturer Part Number: ATTINY167-15MD
• Description: MCU AVR 16K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15MD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.2
7728G–AVR–06/10
Clock Sources
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
Asynchronous Timer Clock – clk
ADC Clock – clk
I/O
CPU
ADC
The CPU clock is routed to parts of the system concerned with the AVR core operation. Exam-
ples of such modules are the General Purpose Register File, the Status Register and the Data
memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like synchronous Timer/Counter. The
I/O clock is also used by the External Interrupt module, but note that some external interrupts
are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O
clock is halted.
The Flash clock controls operation of the Flash interface. The Flash clock is usually active
simultaneously with the CPU clock.
The asynchronous timer clock allows the asynchronous Timer/Counter to be clocked directly
from an external clock or an external low frequency crystal. The dedicated clock domain
allows using this Timer/Counter as a real-time counter even when the device is in sleep mode.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O
clocks in order to reduce noise generated by digital circuitry. This gives more accurate ADC
conversion results.
The device has the following clock source options, selectable by Flash Fuse bits (default) or
by the CLKSELR register (dynamic clock switch circuit) as shown below. The clock from the
selected source is input to the AVR clock generator, and routed to the appropriate modules.
Table 4-1.
Notes:
FLASH
Device Clocking Option
External Clock
Calibrated Internal RC Oscillator 8.0 MHz
Watchdog Oscillator 128 kHz
External Low-frequency Oscillator
External Crystal/Ceramic Resonator (0.4 - 0.9 MHz)
External Crystal/Ceramic Resonator (0.9 - 3.0 MHz)
External Crystal/Ceramic Resonator (3.0 - 8.0 MHz)
External Crystal/Ceramic Resonator (8.0 - 16.0
MHz)
1. For all fuses “1” means unprogrammed while “0” means programmed.
2. Flash Fuse bits.
3. CLKSELR register bits.
Device Clocking Options Select
ASY
(1)
vs. PB4 and PB5 Functionality
CKSEL3..0
CSEL3..0
0000
0010
0011
01xx
100x
101x
110x
111x
ATtiny87/ATtiny167
b
b
b
b
b
b
b
b
(3)
(2)
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
CLKI
PB4
I/O
I/O
CLKO - I/O
CLKO - I/O
CLKO - I/O
XTAL2
XTAL2
XTAL2
XTAL2
XTAL2
PB5
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