ATTINY167-15MD Atmel, ATTINY167-15MD Datasheet - Page 182

• Manufacturer Part Number: ATTINY167-15MD
• Description: MCU AVR 16K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15MD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.6.2
182
ATtiny87/ATtiny167
LIN Status and Interrupt Register - LINSIR
• Bits 7:5 - LIDST[2:0]: Identifier Status
• Bit 4 - LBUSY: Busy Signal
• Bit 3 - LERR: Error Interrupt
• Bit 2 - LIDOK: Identifier Interrupt
• Bit 1 - LTXOK: Transmit Performed Interrupt
Initial Value
Read/Write
enable bit - LENERR - is set in LINENIR.
resets all LINERR bits.
LINENIR.
Bit
– 0xx = no specific identifier,
– 100 = Identifier 60 (0x3C),
– 101 = Identifier 61 (0x3D),
– 110 = Identifier 62 (0x3E),
– 111 = Identifier 63 (0x3F).
– 0 = Not busy,
– 1 = Busy (receiving or transmitting).
– 0 = No error,
– 1 = An error has occurred.
– 0 = No identifier,
– 1 = Slave task: Identifier present, master task: Tx Header complete.
– 0 = No Tx,
– 1 = Tx Response complete.
It is a logical OR of LINERR register bits. This bit generates an interrupt if its respective
The user clears this bit by writing 1 in order to reset this interrupt. Resetting LERR also
In UART mode, this bit is also cleared by reading LINDAT.
This bit generates an interrupt if its respective enable bit - LENIDOK - is set in LINENIR.
The user clears this bit by writing 1, in order to reset this interrupt.
This bit generates an interrupt if its respective enable bit - LENTXOK - is set in
The user clears this bit by writing 1, in order to reset this interrupt.
In UART mode, this bit is also cleared by writing LINDAT.
LIDST2
R
7
0
LIDST1
R
6
0
LIDST0
R
5
0
LBUSY
R
4
0
R/Wone
LERR
3
0
R/Wone
LIDOK
2
0
R/Wone
LTXOK
1
0
R/Wone
LRXOK
0
0
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LINSIR