PIC18F8525-E/PT Microchip Technology, PIC18F8525-E/PT Datasheet - Page 11

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PIC18F8525-E/PT

Manufacturer Part Number
PIC18F8525-E/PT
Description
IC PIC MCU FLASH 24KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F8525-E/PT

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163032
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F8525-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
3.2
Programming code memory is accomplished by first
loading data into the appropriate write buffers and then
initiating a programming sequence. Each panel in the
code memory space (see Figure 2-3) has an 8-byte
deep write buffer that must be loaded prior to initiating
a write sequence. The actual memory write sequence
takes the contents of these buffers and programs the
associated EEPROM code memory.
Typically, all of the program buffers are written in paral-
lel (Multi-Panel Write mode). In other words, in the case
of a 64-Kbyte device (8 panels with an 8-byte buffer per
panel), 64 bytes will be simultaneously programmed
during each programming sequence. In this case, the
offset of the write within each panel is the same (see
Figure 3-4). Multi-Panel Write mode is enabled by
appropriately configuring the Programming Control
register located at 3C0006h.
 2003 Microchip Technology Inc.
Code Memory Programming
The programming duration is externally timed and is
controlled by PGC. After a “Start Programming” com-
mand is issued (4-bit command, ‘1111’), a NOP is
issued, where the 4th PGC is held high for the duration
of the programming time, P9.
After PGC is brought low, the programming sequence
is terminated. PGC must be held low for the time spec-
ified by parameter P10 to allow high voltage discharge
of the memory array.
The code sequence to program a PIC18F6X2X/8X2X
device is shown in Table 3-4. The flow chart shown in
Figure 3-5 depicts the logic necessary to completely
write a PIC18F6X2X/8X2X device. The timing diagram
that details the “Start Programming” command, and
parameters P9 and P10, is shown in Figure 3-6.
Note:
PIC18F6X2X/8X2X
The TBLPTR register must contain the
same offset value when initiating the pro-
gramming sequence as it did when the
write buffers were loaded.
DS30499B-page 11

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