ATMEGA162-16AI Atmel, ATMEGA162-16AI Datasheet - Page 117

• Manufacturer Part Number: ATMEGA162-16AI
• Description: IC MCU AVR 16K 5V 16MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Compare Match
Output Unit
2513K–AVR–07/09
The Compare Output mode (COMnx1:0) bits have two functions. The waveform generator uses
the COMnx1:0 bits for defining the output compare (OCnx) state at the next Compare Match.
Secondly the COMnx1:0 bits control the OCnx pin output source.
schematic of the logic affected by the COMnx1:0 bit setting. The I/O Registers, I/O bits, and I/O
pins in the figure are shown in bold. Only the parts of the general I/O Port Control Registers
(DDR and PORT) that are affected by the COMnx1:0 bits are shown. When referring to the
OCnx state, the reference is for the internal OCnx Register, not the OCnx pin. If a System Reset
occur, the OCnx Register is reset to “0”.
Figure 50. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the output compare (OCnx) from the Waveform
Generator if either of the COMnx1:0 bits are set. However, the OCnx pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OCnx pin (DDR_OCnx) must be set as output before the OCnx value is visi-
ble on the pin. The port override function is generally independent of the Waveform Generation
mode, but there are some exceptions. Refer to
The design of the output compare pin logic allows initialization of the OCnx state before the out-
put is enabled. Note that some COMnx1:0 bit settings are reserved for certain modes of
operation.
The COMnx1:0 bits have no effect on the Input Capture unit.
COMnx1
COMnx0
FOCnx
clk
See “16-bit Timer/Counter Register Description” on page 128.
I/O
Waveform
Generator
Table
D
D
D
PORT
DDR
OCnx
53,
Q
Q
Q
Table 54
1
0
Figure 50
and
ATmega162/V
Table 55
shows a simplified
for details.
OCnx
Pin
117