PIC18C252-E/SO Microchip Technology, PIC18C252-E/SO Datasheet - Page 71

• Manufacturer Part Number: PIC18C252-E/SO
• Description: IC MCU OTP 16KX16 A/D 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C252-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP, SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• For Use With: I3DB18C452 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C252E/SO

REGISTER 7-5:
2001 Microchip Technology Inc.
bit 7-4
bit 3
bit 2
bit 1
bit 0
PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2 (PIR2)
bit 7
Unimplemented: Read as '0'
BCLIF: Bus Collision Interrupt Flag bit
1 = A bus collision occurred (must be cleared in software)
0 = No bus collision occurred
LVDIF: Low Voltage Detect Interrupt Flag bit
1 = A low voltage condition occurred (must be cleared in software)
0 = The device voltage is above the Low Voltage Detect trip point
TMR3IF: TMR3 Overflow Interrupt Flag bit
1 = TMR3 register overflowed (must be cleared in software)
0 = TMR3 register did not overflow
CCP2IF: CCPx Interrupt Flag bit
Capture mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Unused in this mode
Legend:
R = Readable bit
- n = Value at POR reset
U-0
—
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
U-0
—
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
BCLIF
R/W-0
LVDIF
PIC18CXX2
TMR3IF
x = Bit is unknown
R/W-0
DS39026C-page 69
CCP2IF
R/W-0
bit 0