PIC18C252-E/SO Microchip Technology, PIC18C252-E/SO Datasheet - Page 213

• Manufacturer Part Number: PIC18C252-E/SO
• Description: IC MCU OTP 16KX16 A/D 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C252-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP, SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• For Use With: I3DB18C452 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C252E/SO

LFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
2001 Microchip Technology Inc.
After Instruction
Decode
Decode
FSR2H
FSR2L
Q1
Read literal
Read literal
The 12-bit literal ’k’ is loaded into
Load FSR
[ label ]
0
0
k
None
the file select register pointed to
by ’f’.
2
2
LFSR 2, 0x3AB
’k’ MSB
’k’ LSB
1110
1111
Q2
=
=
f
k
FSRf
2
4095
0x03
0xAB
LFSR f,k
1110
0000
Process
Process
Data
Data
Q3
k
00ff
7
kkk
’k’ to FSRfL
Write literal
literal ’k’
MSB to
FSRfH
Write
Q4
k
kkkk
11
kkk
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
WREG
REG
WREG
Q1
register ’f’
Move f
[ label ]
0
d
a
f
N,Z
The contents of register ’f’ are
moved to a destination dependent
upon the status of ’d’. If 'd' is 0, the
result is placed in WREG. If 'd' is 1,
the result is placed back in register
'f' (default). Location 'f' can be any-
where in the 256 byte bank. If ’a’ is
0, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
MOVF
Read
0101
Q2
=
=
=
=
f
[0,1]
[0,1]
dest
PIC18CXX2
255
0x22
0xFF
0x22
0x22
REG, 0, 0
MOVF
00da
Process
Data
Q3
DS39026C-page 211
f [,d [,a]
ffff
Write WREG
Q4
ffff