ST10F269Z2Q6 STMicroelectronics, ST10F269Z2Q6 Datasheet - Page 53

MCU 16BIT 256K FLASH 144PQFP

ST10F269Z2Q6

Manufacturer Part Number
ST10F269Z2Q6
Description
MCU 16BIT 256K FLASH 144PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheets

Specifications of ST10F269Z2Q6

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-QFP
Controller Family/series
ST10
No. Of I/o's
111
Ram Memory Size
12KB
Cpu Speed
40MHz
No. Of Timers
5
Embedded Interface Type
CAN, SSC, USART
Rohs Compliant
Yes
Processor Series
ST10F26x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SSC, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
2 x 16 bit
Operating Supply Voltage
0.3 V to 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4833

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ST10F269
Table 13 : GPT1 Timer Input Frequencies, Resolution and Periods (TQFP144 devices)
Figure 15 : Block Diagram of GPT1
10.2 - GPT2
The GPT2 module provides precise event control
and time measurement. It includes two timers (T5,
T6) and a capture/reload register (CAPREL). Both
timers can be clocked with an input clock which is
derived from the CPU clock via a programmable
prescaler or with external signals. The count
direction
programmable by software or may additionally be
altered dynamically by an external signal on a port
pin (TxEUD). Concatenation of the timers is
supported via the output toggle latch (T6OTL) of
timer T6 which changes its state on each timer
overflow/underflow.
The state of this latch may be used to clock timer
T5, or it may be output on a port pin (T6OUT). The
overflow / underflow of timer T6 can additionally
Pre-scaler factor
Input Freq
Resolution
Period maximum
f
CPU
= 32MHz
CPU Clock
CPU Clock
CPU Clock
T3EUD
T2EUD
T4EUD
T2IN
T3IN
(up/down)
T4IN
2
2
2
n
n
n
16.4ms
n=3...10
n=3...10
250ns
n=3...10
4MHz
000b
8
for
32.8ms
500ns
2MHz
each
001b
16
T3
Mode
Control
T4
Mode
Control
T2
Mode
Control
timer
65.5ms
1MHz
010b
1 s
32
Timer Input Selection T2I / T3I / T4I
is
Reload
Reload
Capture
Capture
500KHz
131ms
011b
2 s
64
be used to clock the CAPCOM timers T0 or T1,
and to cause a reload from the CAPREL register.
The CAPREL register may capture the contents of
timer T5 based on an external signal transition on
the corresponding port pin (CAPIN), and timer T5
may optionally be cleared after the capture
procedure. This allows absolute time differences
to be measured or pulse multiplication to be
performed without software overhead.
The capture trigger (timer T5 to CAPREL) may
also be generated upon transitions of GPT1 timer
T3
advantageous when T3 operates in Incremental
Interface Mode.
Table 14
Resolution and Period (PQFP144 devices) and
Table 15
U/D
GPT1 Timer T3
GPT1 Timer T4
GPT1 Timer T2
10 - GENERAL PURPOSE TIMER UNIT
inputs
262.1ms
250KHz
100b
128
4 s
U/D
U/D
GPT2
GPT2
T3IN
524.3ms
125KHz
101b
Timer
Timer
256
8 s
and/or
T3OTL
Input
Input
62.5KHz
1.05s
110b
16 s
T3EUD.
512
Request
Interrupt
Interrupt
Request
Interrupt
Request
T3OUT
Frequencies,
Frequencies,
31.125KHz
This
111b
1024
32 s
2.1s
53/184
is

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