PIC18F4620-E/PT Microchip Technology, PIC18F4620-E/PT Datasheet - Page 14

• Manufacturer Part Number: PIC18F4620-E/PT
• Description: IC MCU FLASH 32KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4620-E/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DB18F4620 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2525/2620/4525/4620
41. Module: MSSP
EXAMPLE 6:
42. Module: Reset
DS80224E-page 14
When the MSSP is configured for SPI mode, the
Buffer Full Status bit, BF (SSPSTAT<0>), should
not be polled in software to determine when the
transfer is complete.
Work around
Copy the SSPSTAT register into a variable and
perform the bit test on the variable. In Example 6,
SSPSTAT is copied into the working register
where the bit test is performed.
A second option is to poll the Master Synchronous
Serial Port Interrupt Flag bit, SSPIF (PIR1<3>).
This bit can be polled and will set when the transfer
is complete.
Date Codes that pertain to this issue:
All engineering and production devices.
This version of silicon does not support the func-
tionality described in Note 1 of parameter D002 in
Section 26.1 “DC Characteristics: Supply
Voltage” of the data sheet. The RAM content may
be altered during a Reset event if following
conditions are met.
• Device is accessing RAM.
• Asynchronous Reset (i.e., WDT, BOR or MCLR
Work around
None
Date Codes that pertain to this issue:
All engineering and production devices.
loop_MSB:
occurs when a write operation is being
executed (start of a Q4 cycle).
MOVF
BTFSS
BRA
SSPSTAT, W
WREG, BF
loop_MSB
43. Module: MSSP (I
44. Module: MSSP (SPI Slave)
The MSSP module operating in I
mode (SSPM3:SSPM0 = 0110) may not send a
NACK bit (/ACK) in response to receiving the slave
address loaded in SSPADD<7:1>. Addresses are
in one of these ranges:
• 0x00 to 0x07
• 0x78 to 0x7F
These addresses were reserved by Philips
conductors in “The I
released January 2000. Section 10.1 “Definition of
bits in the first byte” defines the purposes of these
addresses.
This specification can be found at:
http://www.semiconductors.philips.com/i2c
Work around
This version of the silicon does not respond to
slave addresses in the ranges previously listed.
Use either of these work arounds:
• Change the 7-bit slave address in SSPADD to
• Use Revision B silicon. This version of silicon
Date Codes that pertain to this issue:
All engineering and production devices.
If configured in SPI Slave mode, the MSSP may not
successfully recognize data packets generated by an
external master processor. This applies to all SPI
Slave modes (CKE/CKP = 1 or 0), whether or not
slave select is enabled (SSPM3:SSPM0 = 010x).
Work around
Insert a series resistor between the SPI master
Serial Data Out (SDO) and the corresponding SPI
slave Serial Data In (SDI) input line of the
microcontroller. The required value for the resistor
varies with the application system’s characteristics
and
microcontrollers.
Experimentation
encouraged.
Date Codes that pertain to this issue:
All engineering and production devices.
an address in the range of 0x08 to 0x77.
removes this issue’s addressing restrictions.
the
process
© 2008 Microchip Technology Inc.
and
2
2
C Specification”, Version 2.1,
C Slave)
variations
thorough
2
C, 7-Bit Slave
between
testing
®
Semi-
the
is