PIC18F45K20-I/ML Microchip Technology, PIC18F45K20-I/ML Datasheet - Page 69

IC PIC MCU FLASH 16KX16 44QFN

PIC18F45K20-I/ML

Manufacturer Part Number
PIC18F45K20-I/ML
Description
IC PIC MCU FLASH 16KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/ML

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
FIGURE 3-53:
© 2009 Microchip Technology Inc.
unsigned
{
}
//
near
char
ptr
for
{
*(ptr
}
EECON1bits.EEPGD
EECON1bits.CFGS
EECON1bits.FREE
EECON1bits.WREN
//
INTCONbits.GIE
EECON2
EECON2
EECON1bits.WR
INTCONbits.GIE
EECON1bits.WREN
NOTE:
execute
=
(i
rom
i;
char
+
(rom
=
=
=
i)
program
unsigned
0x55;
0xAA;
0;
ProgMemWr32(unsigned
code
unsigned
=
=
EXAMPLE PROGRAM MEMORY WRITE FUNCTION
i
=
=
3.11.2
The program is divided into sections that can individually be protected by setting the
appropriate Configuration bits. The protections available are:
Once these protective Configuration bits have been asserted (set to ON), they cannot
be turned off or changed without a programmer executing a Bulk Erase on the
microcontroller, which erases all program memory and data EEPROM memory. It is
possible to prevent other Configuration bits from being changed after the device is
initially programmed using the WRTC Configuration bit.
buffer_ptr[i];
=
=
=
=
=
1;
Code Protect – The CPx bits prevent microcontroller programmers such as the
PICkit 3 from reading the contents of program memory in the address range asso-
ciated with the particular CPx Configuration bit. If a programmer attempts to read
a code-protected section of memory, all locations will read as value 0x00. This
prevents other parties from stealing proprietary program code.
Write Protect – When a WRTx Configuration bit is ON, then program memory
erase or write operations are prohibited from working on the associated range of
memory. This could be used to protect a bootloader from accidental corruption by
inadvertent application program memory writes or erases.
Table Read Protect – The EBTRx bits, when asserted, prevent program memory
locations being read from instructions executing in another program memory
block. For example, if EBTR3 was asserted, then program memory locations from
0x6000 to 0x7FFF by any code executing from program memory locations 0x0000
to 0x5FFF. Locations in the block 0x6000 to 0x7FFF could still be read by code
executing in that block. This could be used, for example, to prevent using a boot-
loader to read out sensitive code-protected data.
<
sequence,
0;
1;
memory
0;
0;
1;
0;
char
1;
32;
char
*ptr;
i++)
Protecting Program Memory in the Configuration Bits.
must
*)(address
which
//
//
//
//
also
PICkit™ 3 Debug Express Lessons
int
cannot
Disable
Begin
Set
re-enable
address,
be
&
WR
erased
Write
0xFFE0);//
//
//
//
//
//
//
interrupts
bit
interrupts
unsigned
to
write
write
not
we're
enable
be
sequence
disable
first.
begin
interrupted,
configuration
ensure
the
to
not
write/erase
char
write/erase
32-byte
flash
data
erasing
write
*buffer_ptr)
into
program
then
write
registers
starts
now.
operations
operations
the
execute
memory
on
holding
32-byte
write32
DS41370C-page 65
registers
boundary

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