PIC12CE519-04/SN Microchip Technology, PIC12CE519-04/SN Datasheet - Page 165

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PIC12CE519-04/SN

Manufacturer Part Number
PIC12CE519-04/SN
Description
IC MCU OTP 1KX12 W/EE 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12CE519-04/SN

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12CE519-04/SN
Manufacturer:
Microchip
Quantity:
360
10.4
10.5
10.6
PORTD<7:0>
PORTD<7:0>
1997 Microchip Technology Inc.
PSPIF
PSPIF
OBF
OBF
CS
WR
RD
IBF
CS
WR
RD
IBF
Note:
Operation in Sleep Mode
Effect of a Reset
PSP Waveforms
The IBF flag bit is inhibited from being cleared until after this point.
Q1
Q1
When in sleep mode the microprocessor may still read and write the Parallel Slave Port. These
actions will set the PSPIF bit. If the PSP interrupts are enabled, this will wake the processor from
sleep mode so that the PSP data latch may be either read, or written with the next value for the
microprocessor.
After any reset the PSP is disabled and PORTD and PORTE are forced to their default mode.
Figure 10-2
Figure 10-3
Figure 10-2: Parallel Slave Port Write Waveforms
Figure 10-3: Parallel Slave Port Read Waveforms
Q2
Q2
shows the waveform for a read of the PSP by the microprocessor.
shows the waveform for a write from the microprocessor to the PSP, while
Q3
Q3
Section 10. Parallel Slave Port
Q4
Q4
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
Q1
Q1
Q2
Q2
Q3
Q3
DS31010A-page 10-5
Q4
Q4
10

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