MCIMX512DJM8C Freescale Semiconductor, MCIMX512DJM8C Datasheet - Page 114

• Manufacturer Part Number: MCIMX512DJM8C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX512DJM8C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 800MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 20 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Characteristics
Figure 71
4.7.11
This section describes the timing parameters of the Parallel ATA module which are compliant with
ATA/ATAPI-5 specification.
Parallel ATA module can work on PIO/Multi-Word DMA/Ultra DMA transfer modes. Each transfer mode
has different data transfer rate, Ultra DMA mode 4 data transfer rate is up to 66 Mbyte/s. Parallel ATA
module interface consist of a total of 29 pins, Some pins act on different function in different transfer
mode. There are different requirements of timing relationships among the function pins conform with
ATA/ATAPI-5 specification and these requirements are configurable by the ATA module registers.
114
1
Ref. No.
CL of PWMO = 30 pF
2a
2b
3a
3b
4a
4b
1
depicts the timing of the PWM, and
P-ATA Timing Parameters
System CLK frequency
Clock high time
Clock low time
Clock fall time
Clock rise time
Output delay time
Output setup time
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
System Clock
PWM Output
Parameter
Table 89. PWM Output Timing Parameter
1
Figure 71. PWM Timing
2a
4a
Table 89
2b
lists the PWM timing parameters.
12.29
9.91
8.71
Min
—
—
—
0
1
3a
ipg_clk
3b
Max
9.37
0.5
0.5
—
—
—
4b
Freescale Semiconductor
Unit
MHz
ns
ns
ns
ns
ns
ns