MCIMX512DJM8C Freescale Semiconductor, MCIMX512DJM8C Datasheet - Page 105

• Manufacturer Part Number: MCIMX512DJM8C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX512DJM8C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 800MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 20 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
These conditions may be chip specific.
2
ACCESS_SIZE is predefined in REGISTER
3
ACCESS_SIZE is predefined in REGISTER
4
DISP_DOWN is predefined in REGISTER
5
DISP_UP is predefined in REGISTER
6
DISP_DOWN is predefined in REGISTER
7
DISP_UP is predefined in REGISTER
8
DISP_DOWN is predefined in REGISTER
Freescale Semiconductor
IP39 Setup time for wait signal
IP47 Read time point
The exact conditions have not been finalized, but will likely match the current customer requirement for their specific display.
Display period value for read
Display period value for write
Display control down for CS
Display control up for CS
Display control down for RS
Display control up for RS
Display control down for read
ID
Table 84. Asynchronous Parallel Interface Timing Parameters (Access Level) (continued)
Parameter
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
13
Tdicdcs
Tdicdrs
Tdicdr
Tswait
Tdrp
Symbol
Tdicucs
Tdicurs
Tdicpw
Tdicpr
=
=
=
=
=
Tdrp–1.5
=
1
-- - T DI_CLK
2
=
1
-- - T DI_CLK
2
1
-- - T
2
⎛
⎝
T DI_CLK
1
-- - T
2
1
-- - T DI_CLK
2
⎛
⎝
⎛
⎝
T
⎛
⎝
⎛
⎝
DI_CLK
DI_CLK
DI_CLK
Min
—
×
×
×
×
ceil
×
×
×
ceil
ceil
ceil
ceil
ceil
ceil
DI_ACCESS_SIZE_#
-------------------------------------------------------- -
2
---------------------------------------------------- -
DI_ACCESS_SIZE_#
-------------------------------------------------------- -
2
---------------------------------------------------- -
DI_CLK_PERIOD
2
---------------------------------------------------- -
DI_CLK_PERIOD
DI_CLK_PERIOD
---------------------------------------------- -
DI_CLK_PERIOD
DI_CLK_PERIOD
---------------------------------------------- -
DI_CLK_PERIOD
×
DI_CLK_PERIOD
×
2
×
2
Tdrp
DISP_DOWN_#
DISP_DOWN_#
×
DISP_DOWN_#
×
DISP_UP_#
DISP_UP_#
Typ
—
1
⎞
⎠
⎞
⎠
⎞
⎠
⎞
⎠
⎞
⎠
Tdrp+1.5
Electrical Characteristics
Max
—
Unit
—
ns
105